Patents by Inventor W. Jean Horkans

W. Jean Horkans has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020027082
    Abstract: A method of reducing etching of a seed layer by a plating solution. Prior to introducing the semiconductor wafer with the seed layer into the plating solution, the etching power of the plating solution is diminished.
    Type: Application
    Filed: October 23, 2001
    Publication date: March 7, 2002
    Inventors: Panayotis C. Andricacos, W. Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Cyprian E. Uzoh
  • Patent number: 6331237
    Abstract: A method of reducing etching of a seed layer by a plating solution. Prior to introducing the semiconductor wafer with the seed layer into the plating solution, the etching power of the plating solution is diminished.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: December 18, 2001
    Assignee: International Business Machines Corporation
    Inventors: Panayotis C. Andricacos, W. Jean Horkans, Keith T. Kwietniak, Peter S. Locke, Cyprian E. Uzoh