Abstract: Continuous time pipeline, level-crossing (LC), analog-to-digital converters (ADCs) use a plurality of stages from a first stage to a last stage. Each stage has an array of comparators that are provided with an array of reference voltage levels. Each stage is configured to detect level crossings of increasing fineness compared to the preceding stage such that the accuracy of a digitized representation of an input signal can be increased by adding stages as well as increasing the number of comparators in each stage. The voltage error in the digitized representation of the signal that remains after each stage provides the input to the subsequent stage. The continuous time pipeline LC ADCs are also applied to analog signal processing and software defined radios.