Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: Improvements in the graphics processing pipeline are disclosed. More specifically, a new primitive shader stage performs tasks of the vertex shader stage or a domain shader stage if tessellation is enabled, a geometry shader if enabled, and a fixed function primitive assembler. The primitive shader stage is compiled by a driver from user-provided vertex or domain shader code, geometry shader code, and from code that performs functions of the primitive assembler. Moving tasks of the fixed function primitive assembler to a primitive shader that executes in programmable hardware provides many benefits, such as removal of a fixed function crossbar, removal of dedicated parameter and position buffers that are unusable in general compute mode, and other benefits.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: A hybrid LIDAR system 100 includes a flash-based LIDAR detector array. A broad laser emitter is operatively connected to the LIDAR detector array for flash-based LIDAR sensing. A first beam steering mechanism is operatively connected with the broad laser emitter for scanning a scene with a broad beam from the broad laser emitter. A second beam steering mechanism is operatively connected with the LIDAR detector array for directing returns of the broad beam from the scene to the LIDAR detector array.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: A hybrid LIDAR system 100 includes a flash-based LIDAR detector array. A broad laser emitter is operatively connected to the LIDAR detector array for flash-based LIDAR sensing. A first beam steering mechanism is operatively connected with the broad laser emitter for scanning a scene with a broad beam from the broad laser emitter. A second beam steering mechanism is operatively connected with the LIDAR detector array for directing returns of the broad beam from the scene to the LIDAR detector array.

Abstract: A method of laser distance measurement includes issuing a command from a single controller to a laser pulse emitter to emit a laser pulse. The method includes issuing a command from the single controller to a laser pulse detector to open for detection of a return of the laser pulse. The method includes detecting a return of the laser pulse, determining total time of travel for the laser pulse, and calculating a distance measurement based on the time of travel of the laser pulse.

Abstract: A computer system is provided that includes devices configured to acquire input data. The system further includes a remote node (RN) configured to receive a first packet from a control node (CN). The first packet includes a packet header including a master timestamp, first control data and a CRC. The RN is also configured to verify integrity of the first control data based on the received CRC, generate and transmit to the CN a second packet. The second packet includes a packet header which includes a remote timestamp. The system also includes a CN connected with the RN via high-speed serial interfaces. The CN is configured to receive the second packet, determine status of the first packet based on the control data included in the second packet and configured to retransmit the first packet or generate and transmit a third packet based on the determined status of the first packet.

Abstract: A method for applying probability functions in real time includes receiving an input value. An optimized binary sequence is selected from a lookup table based on the received input value. The lookup table includes probability values of at least a part of a noise probability sequence. The input value is masked by a least significant bit of the selected optimized binary sequence to yield an output value. The selected optimized binary sequence is right shifted by one bit and the right shifted bit is carried over to a most significant bit position of the selected optimized binary sequence.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: A computer system is provided that includes devices configured to acquire input data. The system further includes a remote node (RN) configured to receive a first packet from a control node (CN). The first packet includes a packet header including a master timestamp, first control data and a CRC. The RN is also configured to verify integrity of the first control data based on the received CRC, generate and transmit to the CN a second packet. The second packet includes a packet header which includes a remote timestamp. The system also includes a CN connected with the RN via high-speed serial interfaces. The CN is configured to receive the second packet, determine status of the first packet based on the control data included in the second packet and configured to retransmit the first packet or generate and transmit a third packet based on the determined status of the first packet.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: A computer system is provided that includes devices configured to acquire input data. The system further includes a remote node (RN) configured to receive a first packet from a control node (CN). The first packet includes a packet header including a master timestamp, first control data and a CRC. The RN is also configured to verify integrity of the first control data based on the received CRC, generate and transmit to the CN a second packet. The second packet includes a packet header which includes a remote timestamp. The system also includes a CN connected with the RN via high-speed serial interfaces. The CN is configured to receive the second packet, determine status of the first packet based on the control data included in the second packet and configured to retransmit the first packet or generate and transmit a third packet based on the determined status of the first packet.

Abstract: A method for applying probability functions in real time includes receiving an input value. An optimized binary sequence is selected from a lookup table based on the received input value. The lookup table includes probability values of at least a part of a noise probability sequence. The input value is masked by a least significant bit of the selected optimized binary sequence to yield an output value. The selected optimized binary sequence is right shifted by one bit and the right shifted bit is carried over to a most significant bit position of the selected optimized binary sequence.

Abstract: A method of laser distance measurement includes issuing a command from a single controller to a laser pulse emitter to emit a laser pulse. The method includes issuing a command from the single controller to a laser pulse detector to open for detection of a return of the laser pulse. The method includes detecting a return of the laser pulse, determining total time of travel for the laser pulse, and calculating a distance measurement based on the time of travel of the laser pulse.

Abstract: A hybrid LIDAR system 100 includes a flash-based LIDAR detector array. A broad laser emitter is operatively connected to the LIDAR detector array for flash-based LIDAR sensing. A first beam steering mechanism is operatively connected with the broad laser emitter for scanning a scene with a broad beam from the broad laser emitter. A second beam steering mechanism is operatively connected with the LIDAR detector array for directing returns of the broad beam from the scene to the LIDAR detector array.

Abstract: A method of establishing a hardware identity of a coordinating device in a wireless network is provided. A standard PHY preamble is modified to a preamble that can be received by the coordinating device having an expected hardware configuration. The modified PHY preamble is transmitted with an association request by a joining device. In response to not receiving a reply containing an association response from the coordinating device by the joining device, determining the hardware configuration of the coordinating device is not the expected hardware configuration. A further method of characterizing a hardware identity of a device in a wireless network is also provided. A request with a modified PHY preamble is transmitted to a device. If a reply is received from the device, characterizing the device as a first hardware type. And, if a reply is not received, characterizing the device as not the first hardware type.

Abstract: A multi-processor computer system with shared memory resources includes a first plurality of sensors configured to acquire inertial and positional data related to a mobile platform. The system further includes a first plurality of co-processors having a hardware logic configured to control the acquisition of the inertial and positional data and configured to analyze the acquired data. The system also includes a second plurality of sensors configured to acquire input data related to the mobile platform connected to a second plurality of co-processors having a hardware logic configured to receive a plurality of streams of input data from the second plurality of sensors and configured to segment the input data into a plurality of discrete data segments. The system also includes a plurality of hardware processing units configured to perform calculations related to the input data using the plurality of data segments.

Abstract: Improvements to graphics processing pipelines are disclosed. More specifically, the vertex shader stage, which performs vertex transformations, and the hull or geometry shader stages, are combined. If tessellation is disabled and geometry shading is enabled, then the graphics processing pipeline includes a combined vertex and graphics shader stage. If tessellation is enabled, then the graphics processing pipeline includes a combined vertex and hull shader stage. If tessellation and geometry shading are both disabled, then the graphics processing pipeline does not use a combined shader stage. The combined shader stages improve efficiency by reducing the number of executing instances of shader programs and associated resources reserved.

Abstract: Improvements in the graphics processing pipeline are disclosed. More specifically, a new primitive shader stage performs tasks of the vertex shader stage or a domain shader stage if tessellation is enabled, a geometry shader if enabled, and a fixed function primitive assembler. The primitive shader stage is compiled by a driver from user-provided vertex or domain shader code, geometry shader code, and from code that performs functions of the primitive assembler. Moving tasks of the fixed function primitive assembler to a primitive shader that executes in programmable hardware provides many benefits, such as removal of a fixed function crossbar, removal of dedicated parameter and position buffers that are unusable in general compute mode, and other benefits.