Abstract: An electrostatic chuck includes a ceramic structural element, at least one electrode disposed on the ceramic structural element, and a surface dielectric layer disposed over the at least one electrode, the surface layer activated by a voltage in the electrode to form an electric charge to electrostatically clamp a substrate to the electrostatic chuck. The surface dielectric layer comprises: (i) an insulator layer of amorphous alumina, of a thickness of less than about 5 microns, disposed over the at least one electrode; and (ii) a stack of dielectric layers disposed over the insulator layer. The stack of dielectric layers includes: (a) at least one dielectric layer including aluminum oxynitride; and (b) at least one dielectric layer including at least one of silicon oxide and silicon oxynitride.

Abstract: An electrostatic chuck includes a ceramic structural element, at least one electrode disposed on the ceramic structural element, and a surface dielectric layer disposed over the at least one electrode, the surface layer activated by a voltage in the electrode to form an electric charge to electrostatically clamp a substrate to the electrostatic chuck. The surface dielectric layer comprises: (i) an insulator layer of amorphous alumina, of a thickness of less than about 5 microns, disposed over the at least one electrode; and (ii) a stack of dielectric layers disposed over the insulator layer. The stack of dielectric layers includes: (a) at least one dielectric layer including aluminum oxynitride; and (b) at least one dielectric layer including at least one of silicon oxide and silicon oxynitride.

Abstract: A process is disclosed which incorporates implantation of a carbon cluster into a substrate to improve the characteristics of transistor junctions when the substrates are doped with Boron and Phosphorous in the manufacturing of PMOS transistor structures in integrated circuits. There are two processes which result from this novel approach: (1) diffusion control for USJ formation; and (2) high dose carbon implantation for stress engineering. Diffusion control for USJ formation is demonstrated in conjunction with a boron or shallow boron cluster implant of the source/drain structures in PMOS. More particularly, first, a cluster carbon ion, such as C16Hx+, is implanted into the source/drain region at approximately the same dose as the subsequent boron implant; followed by a shallow boron, boron cluster, phosphorous or phosphorous cluster ion implant to form the source/drain extensions, preferably using a borohydride cluster, such as B18Hx+ or B10Hx+.

Abstract: A method is proposed for the fabrication of the gate electrode of a semiconductor device such that the effects of gate depletion are minimized. The method is comprised of a dual deposition process wherein the first step is a very thin layer that is doped very heavily by ion implantation. The second deposition, with an associated ion implant for doping, completes the gate electrode. With the two-deposition process, it is possible to maximize the doping at the gate electrode/gate dielectric interface while minimizing risk of boron penetration of the gate dielectric. A further development of this method includes the patterning of both gate electrode layers with the advantage of utilizing the drain extension and source/drain implants as the gate doping implants and the option of offsetting the two patterns to create an asymmetric device.

Abstract: A process is disclosed which incorporates implantation of a carbon cluster into a substrate to improve the characteristics of transistor junctions when the substrates are doped with Boron and Phosphorous in the manufacturing of PMOS transistor structures in integrated circuits. There are two processes which result from this novel approach: (1) diffusion control for USJ formation; and (2) high dose carbon implantation for stress engineering. Diffusion control for USJ formation is demonstrated in conjunction with a boron or shallow boron cluster implant of the source/drain structures in PMOS. More particularly, first, a cluster carbon ion, such as C16Hx+, is implanted into the source/drain region at approximately the same dose as the subsequent boron implant; followed by a shallow boron, boron cluster, phosphorous or phosphorous cluster ion implant to form the source/drain extensions, preferably using a borohydride cluster, such as B18Hx+ or B10Hx+.

Abstract: A process is disclosed which incorporates implantation of a carbon cluster into a substrate to improve the characteristics of transistor junctions when the substrates are doped with Boron and Phosphorous in the manufacturing of PMOS transistor structures in integrated circuits. There are two processes which result from this novel approach: (1) diffusion control for USJ formation; and (2) high dose carbon implantation for stress engineering. Diffusion control for USJ formation is demonstrated in conjunction with a boron or shallow boron cluster implant of the source/drain structures in PMOS. More particularly, first, a cluster carbon ion, such as C16Hx+, is implanted into the source/drain region at approximately the same dose as the subsequent boron implant; followed by a shallow boron, boron cluster, phosphorous or phosphorous cluster ion implant to form the source/drain extensions, preferably using a borohydride cluster, such as B18Hx+ or B10Hx+.

Abstract: A method of semiconductor manufacturing is disclosed in which doping is accomplished by the implantation of ion beams formed from ionized molecules, and more particularly to a method in which molecular and cluster dopant ions are implanted into a substrate with and without a co-implant of non-dopant cluster ion, such as a carbon cluster ion, wherein the dopant ion is implanted into the amorphous layer created by the co-implant in order to reduce defects in the crystalline structure, thus reducing the leakage current and improving performance of the semiconductor junctions. These compounds include co-implants of carbon clusters with implants of monomer or cluster dopants or simply implanting cluster dopants. In particular, the invention described herein consists of a method of implanting semiconductor wafers implanting semiconductor wafers with carbon clusters followed by implants of boron, phosphorus, or arsenic, or followed with implants of dopant clusters of boron, phosphorus, or arsenic.

Abstract: The service lifetime of an ion source is enhanced or prolonged by the source having provisions for in-situ etch cleaning of the ion source and of an extraction electrode, using reactive halogen gases (F or Cl), and by having features that extend the service duration between cleanings. The latter include accurate vapor flow control, accurate focusing of the ion beam optics, and thermal control of the extraction electrode that prevents formation of deposits or prevents electrode destruction. An apparatus comprised of an ion source for generating dopant ions for semiconductor wafer processing is coupled to a remote plasma source which delivers F or Cl ions to the first ion source for the purpose of cleaning deposits in the first ion source and the extraction electrode. These methods and apparatus enable long equipment uptime when running condensable feed gases such as sublimated vapor sources, and are particularly applicable for use with so-called cold ion sources.

Abstract: A method is proposed for the fabrication of the gate electrode of a semiconductor device such that the effects of gate depletion are minimized. The method is comprised of a dual deposition process wherein the first step is a very thin layer that is doped very heavily by ion implantation. The second deposition, with an associated ion implant for doping, completes the gate electrode. With the two-deposition process, it is possible to maximize the doping at the gate electrode/gate dielectric interface while minimizing risk of boron penetration of the gate dielectric. A further development of this method includes the patterning of both gate electrode layers with the advantage of utilizing the drain extension and source/drain implants as the gate doping implants and the option of offsetting the two patterns to create an asymmetric device.

Abstract: A process is disclosed which incorporates implantation of a carbon cluster into a substrate to improve the characteristics of transistor junctions when the substrates are doped with Boron and Phosphorous in the manufacturing of PMOS transistor structures in integrated circuits. There are two processes which result from this novel approach: (1) diffusion control for USJ formation; and (2) high dose carbon implantation for stress engineering. Diffusion control for USJ formation is demonstrated in conjunction with a boron or shallow boron cluster implant of the source/drain structures in PMOS. More particularly, first, a cluster carbon ion, such as C16Hx+, is implanted into the source/drain region at approximately the same dose as the subsequent boron implant; followed by a shallow boron, boron cluster, phosphorous or phosphorous cluster ion implant to form the source/drain extensions, preferably using a borohydride cluster, such as B18Hx+ or B10Hx+.

Abstract: A method is proposed for the fabrication of the gate electrode of a semiconductor device such that the effects of gate depletion are minimized. The method is comprised of a dual deposition process wherein the first step is a very thin layer that is doped very heavily by ion implantation. The second deposition, with an associated ion implant for doping, completes the gate electrode. With the two-deposition process, it is possible to maximize the doping at the gate electrode/gate dielectric interface while minimizing risk of boron penetration of the gate dielectric. A further development of this method includes the patterning of both gate electrode layers with the advantage of utilizing the drain extension and source/drain implants as the gate doping implants and the option of offsetting the two patterns to create an asymmetric device.

Abstract: The service lifetime of an ion source is enhanced or prolonged by the source having provisions for in-situ etch cleaning of the ion source and of an extraction electrode, using reactive halogen gases, and by having features that extend the service duration between cleanings. The latter include accurate vapor flow control, accurate focusing of the ion beam optics, and thermal control of the extraction electrode that prevents formation of deposits or prevents electrode destruction. An apparatus comprised of an ion source for generating dopant ions for semiconductor wafer processing is coupled to a remote plasma source which delivers F or Cl ions to the first ion source for the purpose of cleaning deposits in the first ion source and the extraction electrode. These methods and apparatus enable long equipment uptime when running condensable feed gases such as sublimated vapor sources, and are particularly applicable for use with so-called cold ion sources.

Abstract: A process is disclosed which incorporates implantation of a carbon cluster into a substrate to improve the characteristics of transistor junctions when the substrates are doped with Boron and Phosphorous in the manufacturing of PMOS transistor structures in integrated circuits. There are two processes which result from this novel approach: (1) diffusion control for USJ formation; and (2) high dose carbon implantation for stress engineering. Diffusion control for USJ formation is demonstrated in conjunction with a boron or shallow boron cluster implant of the source/drain structures in PMOS. More particularly, first, a cluster carbon ion, such as C16Hx+, is implanted into the source/drain region at approximately the same dose as the subsequent boron implant; followed by a shallow boron, boron cluster, phosphorous or phosphorous cluster ion implant to form the source/drain extensions, preferably using a borohydride cluster, such as B18Hx+ or B10Hx+.

Abstract: Ion implantation with high brightness, ion beam by ionizing gas or vapor, e.g. of dimers, or decaborane, by direct electron impact ionization adjacent the outlet aperture (46, 176) of the ionization chamber (80; 175)). Preferably: conditions are maintained that produce a substantial ion density and limit the transverse kinetic energy of the ions to less than 0.7 eV; width of the ionization volume adjacent the aperture is limited to width less than about three times the width of the aperture; the aperture is extremely elongated; magnetic fields are avoided or limited; low ion beam noise is maintained; conditions within the ionization chamber are maintained that prevent formation of an arc discharge. With ion beam optics, such as the batch implanter of FIG. (20), or in serial implanters, ions from the ion source are transported to a target surface and implanted; advantageously, in some cases, in conjunction with acceleration-deceleration beam lines employing cluster ion beams.

Abstract: An ion implantation is disclosed that includes an ionization chamber having a restricted outlet aperture and configured so that the gas or vapor in the ionization chamber is at a pressure substantially higher than the pressure within an extraction region into which the ions are to be extracted external to the ionization chamber. The vapor is ionized by direct electron impact ionization by an electron source that is in a region adjacent the outlet aperture of the ionization chamber to produce ions from the molecules of the gas or vapor to a density of at least 1010 cm?3 at the aperture while maintaining conditions that limit the transverse kinetic energy of the ions to less than about 0.7 eV. The beam is transported to a target surface and the ions of the transported ion beam are implanted into the target.

Abstract: A method of semiconductor manufacturing is disclosed in which doping is accomplished by the implantation of ion beams formed from ionized molecules, and more particularly to a method in which molecular and cluster dopant ions are implanted into a substrate with and without a co-implant of non-dopant cluster ion, such as a carbon cluster ion, wherein the dopant ion is implanted into the amorphous layer created by the co-implant in order to reduce defects in the crystalline structure, thus reducing the leakage current and improving performance of the semiconductor junctions. Dopant ion compounds of the form AnHx+ and AnRzHx+ are used in order to minimize crystal defects as a result of ion implantation. These compounds include co-implants of carbon clusters with implants of monomer or cluster dopants or simply implanting cluster dopants.

Abstract: A method is proposed for the fabrication of the gate electrode of a semiconductor device such that the effects of gate depletion are minimized. The method is comprised of a dual deposition process wherein the first step is a very thin layer that is doped very heavily by ion implantation. The second deposition, with an associated ion implant for doping, completes the gate electrode. With the two-deposition process, it is possible to maximize the doping at the gate electrode/gate dielectric interface while minimizing risk of boron penetration of the gate dielectric. A further development of this method includes the patterning of both gate electrode layers with the advantage of utilizing the drain extension and source/drain implants as the gate doping implants and the option of offsetting the two patterns to create an asymmetric device.

Abstract: An ion implantation is disclosed that includes an ionization chamber having a restricted outlet aperture and configured so that the gas or vapor in the ionization chamber is at a pressure substantially higher than the pressure within an extraction region into which the ions are to be extracted external to the ionization chamber. The vapor is ionized by direct electron impact ionization by an electron source that is in a region adjacent the outlet aperture of the ionization chamber to produce ions from the molecules of the gas or vapor to a density of at least 1010 cm?3 at the aperture while maintaining conditions that limit the transverse kinetic energy of the ions to less than about 0.7 eV. The beam is transported to a target surface and the ions of the transported ion beam are implanted into the target.

Abstract: The service lifetime of an ion source is enhanced or prolonged by the source having provisions for in-situ etch cleaning of the ion source and of an extraction electrode, using reactive halogen gases, and by having features that extend the service duration between cleanings. The latter include accurate vapor flow control, accurate focusing of the ion beam optics, and thermal control of the extraction electrode that prevents formation of deposits or prevents electrode destruction. An apparatus comprised of an ion source for generating dopant ions for semiconductor wafer processing is coupled to a remote plasma source which delivers F or Cl ions to the first ion source for the purpose of cleaning deposits in the first ion source and the extraction electrode. These methods and apparatus enable long equipment uptime when running condensable feed gases such as sublimated vapor sources, and are particularly applicable for use with so-called cold ion sources.

Abstract: The service lifetime of an ion source is enhanced or prolonged by the source having provisions for in-situ etch cleaning of the ion source and of an extraction electrode, using reactive halogen gases, and by having features that extend the service duration between cleanings. The latter include accurate vapor flow control, accurate focusing of the ion beam optics, and thermal control of the extraction electrode that prevents formation of deposits or prevents electrode destruction. An apparatus comprised of an ion source for generating dopant ions for semiconductor wafer processing is coupled to a remote plasma source which delivers F or Cl ions to the first ion source for the purpose of cleaning deposits in the first ion source and the extraction electrode. These methods and apparatus enable long equipment uptime when running condensable feed gases such as sublimated vapor sources, and are particularly applicable for use with so-called cold ion sources.