Patents by Inventor Wade Allen

Wade Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10559879
    Abstract: An active electronic steered antenna (AESA) circuit monitors bursts of a phased array that has a plurality of signal chains. Each signal chain therefore has a burst output for transmitting at least one burst. To monitor bursts, the AESA circuit has an input that is operably couplable with the burst output of at least one signal chain of the phased array. The input is configured to receive one or more bursts transmitted by the burst output(s) of the at least one signal chain. The AESA circuit also has a sample circuit operably coupled with the input and configured to sample the one or more bursts to produce one or more corresponding samples, and memory operably coupled with the sample circuit. The memory receives and stores the one or more samples. To provide access to the samples, the AESA circuit also has a memory interface.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: February 11, 2020
    Assignee: Anokiwave, Inc.
    Inventors: Wade Allen, Robert McMorrow, David Corman
  • Publication number: 20180019517
    Abstract: An active electronic steered antenna (AESA) circuit monitors bursts of a phased array that has a plurality of signal chains. Each signal chain therefore has a burst output for transmitting at least one burst. To monitor bursts, the AESA circuit has an input that is operably couplable with the burst output of at least one signal chain of the phased array. The input is configured to receive one or more bursts transmitted by the burst output(s) of the at least one signal chain. The AESA circuit also has a sample circuit operably coupled with the input and configured to sample the one or more bursts to produce one or more corresponding samples, and memory operably coupled with the sample circuit. The memory receives and stores the one or more samples. To provide access to the samples, the AESA circuit also has a memory interface.
    Type: Application
    Filed: July 18, 2016
    Publication date: January 18, 2018
    Inventors: Wade Allen, Robert McMorrow, David Corman
  • Patent number: 8497736
    Abstract: A power amplifier having a driver stage and an output stage is configured to provide an amplified RF input signal. The driver stage of the power amplifier consists of one or more driver circuits consisting of a network of transistors, current sources, capacitive elements and resistive elements. An RF input signal is fed into the driver stage which is configured to provide a dynamic DC bias and an RF signal gain to a base terminal of a Bipolar Junction Transistor (BJT) power device present in the output stage. The output stage includes of a network of transistors, capacitive and resistive elements and when driven by the DC bias and the RF signal from the driver stage produces an amplified RF input signal at an output side of the output stage.
    Type: Grant
    Filed: October 31, 2011
    Date of Patent: July 30, 2013
    Assignee: Anadigics, Inc.
    Inventors: Dirk Leipold, Wade Allen, Gary Hau
  • Patent number: 7702780
    Abstract: For monitoring a data processing system, a sequence of critical conditions with increasing severity indexes is defined. Each critical condition is detected when a corresponding state parameter exceeds a threshold value with a predefined persistence over time. The persistence may be specified by a minimum number of repeated occurrences of this event, with a maximum number of consecutive non-occurrences that are allowed between them. Whenever critical conditions are detected, the monitoring application retrieves the severity index of the last detected critical condition with the highest severity index, and calculates an incremental index indicative of how closely the state parameter is approaching the next critical condition. An indicator of the health of the system may be generated by subtracting the severity index of the last critical condition plus the incremental index from an optimal value.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: April 20, 2010
    Assignee: International Business Machines Corporation
    Inventors: Wade Allen, Paolo Deidda, David Anthony Fresquez, Antonio Perrone, Rosalind Radcliffe
  • Publication number: 20070005298
    Abstract: For monitoring a data processing system, a sequence of critical conditions with increasing severity indexes is defined. Each critical condition is detected when a corresponding state parameter exceeds a threshold value with a predefined persistence over time. The persistence may be specified by a minimum number of repeated occurrences of this event, with a maximum number of consecutive non-occurrences that are allowed between them. Whenever critical conditions are detected, the monitoring application retrieves the severity index of the last detected critical condition with the highest severity index, and calculates an incremental index indicative of how closely the state parameter is approaching the next critical condition. An indicator of the health of the system may be generated by subtracting the severity index of the last critical condition plus the incremental index from an optimal value.
    Type: Application
    Filed: June 22, 2005
    Publication date: January 4, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wade Allen, Paolo Deidda, David Fresquez, Antonio Perrone, Rosalind Radcliffe