Patents by Inventor Wade C. Allen
Wade C. Allen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11949164Abstract: Register banks are used to allow for fast beam switching in a phased array system. Each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: January 27, 2023Date of Patent: April 2, 2024Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20230275363Abstract: Register banks are used to allow for fast beam switching in a phased array system. Each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: January 27, 2023Publication date: August 31, 2023Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20220013922Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: September 23, 2021Publication date: January 13, 2022Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 11133603Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: November 16, 2020Date of Patent: September 28, 2021Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20210075125Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: November 16, 2020Publication date: March 11, 2021Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 10862222Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be preprogrammed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: June 10, 2019Date of Patent: December 8, 2020Assignee: Anokiwave, Inc.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. Mcmorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 10742288Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.Type: GrantFiled: December 14, 2018Date of Patent: August 11, 2020Assignee: ANOKIWAVE, INC.Inventors: Robert J. McMorrow, Vipul Jain, Wade C. Allen, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Nitin Jain
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Publication number: 20190312359Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: June 10, 2019Publication date: October 10, 2019Inventors: Kristian N. MADSEN, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 10381990Abstract: In a preferred embodiment, the gain expansion in low power mode of a single chain PA is minimized by dynamically adjusting the output impedance of the bias circuit of each gain stage for each mode of operation. Instead of switching in a series attenuator or switching in additional feedback in the first gain stage of a single-chain PA to limit the gain at the increased quiescent current level, this embodiment achieves linear performance by adjusting the quiescent current in each stage to the minimum level that meets the target gain and then increasing the output resistance of the bias circuit of each gain stage in low power mode (LPM) to provide the appropriate level of negative feedback at the base of each amplifying HBT to linearize the gain versus power response.Type: GrantFiled: February 14, 2018Date of Patent: August 13, 2019Assignee: Skyworks Solutions, Inc.Inventor: Wade C. Allen
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Patent number: 10320093Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be preprogrammed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: GrantFiled: August 31, 2016Date of Patent: June 11, 2019Assignee: ANOKIWAVE, INC.Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Publication number: 20190132035Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.Type: ApplicationFiled: December 14, 2018Publication date: May 2, 2019Inventors: Robert J. McMorrow, Vipul Jain, Wade C. Allen, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Nitin Jain
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Patent number: 10200098Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.Type: GrantFiled: December 23, 2016Date of Patent: February 5, 2019Assignee: Anokiwave, Inc.Inventors: Robert J. McMorrow, Vipul Jain, Wade C. Allen, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Nitin Jain
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Publication number: 20180294779Abstract: In a preferred embodiment, the gain expansion in low power mode of a single chain PA is minimized by dynamically adjusting the output impedance of the bias circuit of each gain stage for each mode of operation. Instead of switching in a series attenuator or switching in additional feedback in the first gain stage of a single-chain PA to limit the gain at the increased quiescent current level, this embodiment achieves linear performance by adjusting the quiescent current in each stage to the minimum level that meets the target gain and then increasing the output resistance of the bias circuit of each gain stage in low power mode (LPM) to provide the appropriate level of negative feedback at the base of each amplifying HBT to linearize the gain versus power response.Type: ApplicationFiled: February 14, 2018Publication date: October 11, 2018Inventor: Wade C. Allen
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Publication number: 20180183504Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.Type: ApplicationFiled: December 23, 2016Publication date: June 28, 2018Inventors: Robert J. McMorrow, Vipul Jain, Wade C. Allen, David W. Corman, Robert Ian Gresham, Kristian N. Madsen, Nitin Jain
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Patent number: 9917549Abstract: In a preferred embodiment, the gain expansion in low power mode of a single chain PA is minimized by dynamically adjusting the output impedance of the bias circuit of each gain stage for each mode of operation. Instead of switching in a series attenuator or switching in additional feedback in the first gain stage of a single-chain PA to limit the gain at the increased quiescent current level, this embodiment achieves linear performance by adjusting the quiescent current in each stage to the minimum level that meets the target gain and then increasing the output resistance of the bias circuit of each gain stage in low power mode (LPM) to provide the appropriate level of negative feedback at the base of each amplifying HBT to linearize the gain versus power response.Type: GrantFiled: August 11, 2014Date of Patent: March 13, 2018Assignee: Skyworks Solutions, Inc.Inventor: Wade C. Allen
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Publication number: 20180062274Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be preprogrammed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.Type: ApplicationFiled: August 31, 2016Publication date: March 1, 2018Inventors: Kristian N. Madsen, Wade C. Allen, Jonathan P. Comeau, Robert J. McMorrow, David W. Corman, Nitin Jain, Robert Ian Gresham, Gaurav Menon, Vipul Jain
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Patent number: 5704041Abstract: In an Open System Interconnection (OSI) environment, an agent Common Management Information Protocol (CMIP) platform maintains an up to date tree of all of the Managed Object Instances (MOIs), in order to perform scoping functions. The agent platform receives a message from an OSI manager which includes a base MOI and levels below the base MOI to receive the message. The agent platform recurses through the tree below the base MOI to determine which MOIs should receive the message. If the message is delete, the children of MOIs to be deleted are also deleted. The children of undeletable MOIs are not deleted. A current, accurate tree is maintained by the agent platform, which can register a new MOI in the tree when a valid request is received from the MOI or the manager. The agent platform can also deregister an MOI upon valid request from the agent associated with the platform.Type: GrantFiled: September 21, 1994Date of Patent: December 30, 1997Assignee: International Business Machines CorporationInventors: Wade C. Allen, Jeremy Philip Goodwin, Robert Louis Nielsen, Paul Joseph Reder, Douglas Toltzman
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Patent number: 5519868Abstract: Information on GDMO managed objects, including class hierarchy and the name binding templates, is compiled into a naming table. This naming table is built from an inheritance table and the name binding template information. The inheritance table indicates the inheritance hierarchy of the managed object classes. The compiler builds the inheritance table as a square matrix with a row and column for each class, and the classes arranged in an ordered list from highest to lowest in hierarchy. The compiler enters a one at each position in the inheritance table to indicate that the managed object class in the row inherits from the managed class in the column.With the inheritance table as a ready reference, the compiler builds the naming table from the name binding templates available as listed in the GDMO source files. The naming table is a square matrix identical to the inheritance table except the entries in the naming table are not ones and zeros.Type: GrantFiled: December 30, 1993Date of Patent: May 21, 1996Assignee: International Business Machines CorporationInventors: Wade C. Allen, Jeremy P. Goodwin, Paul J. Reder
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Patent number: 5519863Abstract: Problems with prior OSI (Open Systems Interconnected) event forwarding discriminators (EFD) are solved in accordance with this invention by creating a new type of EFD, called a notification forwarding discriminator (NFD). An NFD works just like an EFD in that it receives notifications emitted by managed objects and determines what types of notifications should be forwarded. However, the forwarding mechanism in an NFD is completely different. An NFD has two operations that a management application can use to control subscription to notifications, "start" and "stop". An NFD forwards notifications via responses to a solicited "start" operation without signaling the end of the "start" operation. Hence, a "start" operation will always be pending completion. The manager and agent track this pending status of operations between a manager and an NFD. Both the manager and agent maintain a pending completion list for each link between a manager and agent.Type: GrantFiled: September 21, 1994Date of Patent: May 21, 1996Assignee: International Business Machines CorporationInventors: Wade C. Allen, Mark C. Zelek
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Patent number: 5491822Abstract: Managed Object Instances (MOIs) in a network of OSI computing systems are created, or deleted, without disrupting their interaction with other managed object instances. This is accomplished by a multi-phase commit process operation where in the first phase, a create or delete request is verified, and the CMIP platform places the created or deleted MOI on a pending list in the CMIP platform, along with information identifying the location of the MOI in a hierarchy of MOIs. In the second phase, the object being created or deleted is asked to accept, or reject, the request. The object responds saying that it accepts or rejects the request. If the request is acceptable, the CMIP platform finishes the object's connection to the tree hierarchy, or disconnects the object from the tree. Then the CMIP platform sends back a message to the object to acknowledge the creation of the object, or to tell the object to delete itself. Finally, the CMIP platform sends a request completion message to the manager.Type: GrantFiled: December 30, 1993Date of Patent: February 13, 1996Assignee: International Business Machines CorporationInventors: Wade C. Allen, Jeremy P. Goodwin, Robert L. Nielsen, Paul J. Reder, Douglas Toltzman