Patents by Inventor Wahei Kitamura

Wahei Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4994411
    Abstract: A process of producing a semiconductor device involving the steps of providing a lead frame having inner leads spaced from each other and connected together by a connecting portion; bonding a layer of an insulating material to the connecting portion and to surrounding portions of the inner leads; removing the connecting portion and a portion of the layer of insulating material to form end portions of the inner leads which are separated from each other and retained in a spaced arrangement by a remaning portion of the layer of insulating material; joining a semiconductor chip having bonding pads to the end portions of the inner leads; connecting the bonding pads on the semiconductor chip and the inner leads by wires; and encapsulating the semiconductor chip, the remaining portion of the layer of insulating material, the inner leads and the wires within a resin material; a peripheral portion of one face of the semiconductor chip partially overlapping faces of the end portions.
    Type: Grant
    Filed: March 10, 1989
    Date of Patent: February 19, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Takahiro Naito, Gen Murakami, Hiromichi Suzuki, Hajime Sato, Wahei Kitamura, Masachika Masuda
  • Patent number: 4971196
    Abstract: In surface packaging of thin resin packages such as resin molded memory ICs or the like, cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging. To solve this problem, the devices are packaged moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging.
    Type: Grant
    Filed: August 10, 1989
    Date of Patent: November 20, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Wahei Kitamura, Gen Murakami, Kunihiko Nishi
  • Patent number: 4845543
    Abstract: A semiconductor device in which a pellet and external leads are connected by bonding wires made of aluminum containing a predetermined amount of at least one additive element, the bonding wires containing 0.05 to 3.0 weight % of at least one element selected from the group consisting of iron and palladium, or containing 0.05-3.0 weight % of at least one first element selected from the group consisting of nickel, iron and palladium and 0.05-3.0 weight % of at least one second element selected from the group consisting of magnesium, manganese and silicon, whereby the corrosion resistance of the wire is increased and the breaking strength of the wire is enhanced. The bonding wires can be connected to the semiconductor pellet by a ball bond, and it is disclosed that using a ball having a Vickers hardness of 30-50 enables good bonding of the bonding wire to, e.g., an aluminum pad on the semiconductor pellet to be achieved.
    Type: Grant
    Filed: June 29, 1987
    Date of Patent: July 4, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Susumu Okikawa, Hiroshi Mikino, Hiromichi Suzuki, Wahei Kitamura, Daiji Sakamoto