Abstract: In the fabrication of gate oxides in IC process, a suitable cleaning/etching process is required to remove the native oxides and reduce surface microroughness in addition to standard RCA cleaning. For ultrathin oxide thickness (<10 nm), it is an important issue to have a native-oxide-free and H-passivated silicon (Si) surface to ensure high breakdown field, high charge-to-breakdown, and low leakage current. According to these concepts, we propose an invention with a simple two-step hydrogen fluoride (HF) etching process to improve the electrical properties of liquid-phase deposited fluorinated silicon oxides (LPD-SiOF), including effective removal of native oxides, lowering of interface trap density (˜1010 eV−1 cm−2), reduction of surface microroughness (Ra=0.1 nm), and raising of breakdown field (˜9.7 MV/cm). Furthermore, rapid thermal annealing (RTA) is also used to further improve the oxide quality.

Abstract: In the fabrication of gate oxides in IC process, a suitable cleaning/etching process is required to remove the native oxides and reduce surface microroughness in addition to standard RCA cleaning. For ultrathin oxide thickness (<10 nm), it is an important issue to have a native-oxide-free and H-passivated silicon (Si) surface to ensure high breakdown field, high charge-to-breakdown, and low leakage current. According to these concepts, we propose an invention with a simple two-step hydrogen fluoride (HF) etching process to improve the electrical properties of liquid-phase deposited fluorinated silicon oxides (LPD-SiOF), including effective removal of native oxides, lowering of interface trap density (˜1010 eV−1 cm−2), reduction of surface microroughness (Ra=0.1 nm), and raising of breakdown field (˜9.7 MV/cm). Furthermore, rapid thermal annealing (RTA) is also used to further improve the oxide quality.