Abstract: An Electrical Fast Transient/Burst (EFT/B) detection and recovery system for a Universal Serial Bus (USB) device. The system includes a USB core and a burst controller. The USB core provides serial communications with a host device through a USB data channel. The burst controller is coupled to the USB core. The burst controller detects an EFT/B event and automatically reconnects the USB core to the host device in response to recognition of a suspend state of the USB core by the host device.

Abstract: An Electrical Fast Transient/Burst (EFT/B) detection and recovery system for a Universal Serial Bus (USB) device. The system includes a USB core and a burst controller. The USB core provides serial communications with a host device through a USB data channel. The burst controller is coupled to the USB core. The burst controller detects an EFT/B event and automatically reconnects the USB core to the host device in response to recognition of a suspend state of the USB core by the host device.

Abstract: A system and method for demodulating amplitude modulated input signals uses two comparators and a charge pump circuit, which is positioned between the two comparators, to produce a demodulated signal of an amplitude modulated input signal. The two comparators and the charge pump circuit form a demodulating unit that may be a part of an infrared remote control receiver. The first comparator converts the input signal from a waveform to a pulse form. The charge pump circuit then converts the pulse signal into an integrated signal in a triangular pulse form. The second comparator converts the integrated signal from a triangular pulse form to a rectangular pulse form to produce the demodulated signal.

Abstract: An optical receiver has a voltage supply, a first node, and a second node. A first input of a differential amplifier is coupled to the first node and a second input of the differential amplifier is coupled to the second node. A photodetector is coupled between the voltage supply and the first node, which produces a photodetector capacitance. A programmable variable capacitor having a capacitance selectively matched to the photodetector capacitance is coupled between the voltage supply and the second node.

Abstract: A reference voltage circuit includes first circuitry that generates a thermal voltage that is approximately proportional to absolute temperature, a first voltage multiplier, second circuitry that generates an inverse thermal voltage that is approximately inversely proportional to absolute temperature, a second voltage multiplier and a summer. The first voltage multiplier multiplies the thermal voltage to obtain a first multiplied voltage. The multiplied voltage is not equal to the thermal voltage. The second voltage multiplier multiplies the inverse thermal voltage to obtain a second multiplied voltage. The summer sums the first multiplied voltage with the second multiplied voltage to obtain a reference voltage.

Abstract: A technique for relative velocity determination between a surface and a velocity determination system involves capturing a set of outputs from a first photosensor array and then comparing subsequently captured sets of outputs from a second photosensor array to the set of outputs from the first photosensor array until a satisfactory match is found between the outputs. Once a satisfactory match is found, the elapsed time between the capture of the two sets of outputs represents the time to travel the known separation distance between the two photosensor arrays. Given the known distance of travel and the elapsed time to travel the distance, the relative velocity is a simple calculation of the distance traveled divided by the time to travel the distance.

Abstract: A technique for relative velocity determination between a surface and a velocity determination system involves capturing a set of outputs from a first photosensor array and then comparing subsequently captured sets of outputs from a second photosensor array to the set of outputs from the first photosensor array until a satisfactory match is found between the outputs. Once a satisfactory match is found, the elapsed time between the capture of the two sets of outputs represents the time to travel the known separation distance between the two photosensor arrays. Given the known distance of travel and the elapsed time to travel the distance, the relative velocity is a simple calculation of the distance traveled divided by the time to travel the distance.

Abstract: A fast-settling digital automatic gain control circuit comprises first and second gain-controllable amplifiers in series. Each amplifier can be digitally switched between minimum and maximum gains by control logic that receives inputs from a multi-level voltage comparator. A peak detector connected to the output of the first gain-controlled amplifier is used to set the overall operating ranges for several threshold detectors. Four reference voltages are generated from the peak detector. The highest reference voltage is used to clock and reset the gain control logic with a hysteresis comparator to the instantaneous input signal from the first gain-controlled amplifier. The three other lower reference voltages are used to provide three-bits of digital input data to the gain control logic. Two digital controls are output, a min/max gain bit for the first gain-controlled amplifier, and a similar min/max gain bit for the second gain-controlled amplifier.

Abstract: A multi-stage light emitting diode (LED) driver circuit is provided. The circuit includes a driver transistor coupled to an LED. The LED is coupled at a drain of the driver transistor and the driver transistor drives current to the LED. A first transistor stack is coupled between a gate of the driver transistor and ground. A first inverter stage is coupled to a common gate of the first transistor stack. The first inverter stage is further coupled between a high voltage source and ground. A second inverter stage is coupled to a common gate of the first inverter stage. The second inverter stage is further coupled between the high voltage source and ground. The circuit further includes a first transistor coupled between the high voltage source and gate of the driver transistor. The gate of the transistor is coupled to the first inverter stage.

Abstract: A reference voltage circuit includes first circuitry that generates a thermal voltage that is approximately proportional to absolute temperature, a first voltage multiplier, second circuitry that generates an inverse thermal voltage that is approximately inversely proportional to absolute temperature, a second voltage multiplier and a summer. The first voltage multiplier multiplies the thermal voltage to obtain a first multiplied voltage. The multiplied voltage is not equal to the thermal voltage. The second voltage multiplier multiplies the inverse thermal voltage to obtain a second multiplied voltage. The summer sums the first multiplied voltage with the second multiplied voltage to obtain a reference voltage.

Abstract: In one embodiment, a comparator is provided with a first differential input stage that receives an input voltage and a reference voltage and produces a first differential output, and a second differential input stage that has differential inputs and produces a second differential output. A comparator stage produces a comparator output in response to the first and second differential outputs. The comparator also has a hysteresis control circuit, the components of which include 1) a resistor and a hysteresis regulating voltage input, coupled between the differential inputs of the second differential input stage, 2) first and second current generators, and 3) at least one switch, under control of the comparator output, to alternately enable different combinations of the first and second current generators, thereby inducing a first or a second current through the resistor.

Abstract: In one embodiment, a comparator is provided with a first differential input stage that receives an input voltage and a reference voltage and produces a first differential output, and a second differential input stage that has differential inputs and produces a second differential output. A comparator stage produces a comparator output in response to the first and second differential outputs. The comparator also has a hysteresis control circuit, the components of which include 1) a resistor and a hysteresis regulating voltage input, coupled between the differential inputs of the second differential input stage, 2) first and second current generators, and 3) at least one switch, under control of the comparator output, to alternately enable different combinations of the first and second current generators, thereby inducing a first or a second current through the resistor.