Abstract: An improved transmission line network includes a transmission line connecting a signal source to a plurality of capacitive loads. Preferably, the transmission line is not terminated with its characteristic impedance. The transmission line may include capacitance added for the purpose of smoothing the rising or falling edge of signals distorted by reflections from the far end of the network. In addition, the transmission line network preferably includes resistance added in series with the transmission line for the purpose of dissipating reflections from the far end and thereby reducing distortion upstream from the series resistors. The capacitive loads may be connected to the transmission line through series resistors, the magnitudes of which are selected to obtain uniform rise or fall times at all loads.

Abstract: A distributed transmission line network for connecting a plurality of DUTs to a low-power driver includes a plurality of distributed transmission lines with distributed capacitors. The distributed capacitors are added to the distributed transmission lines to make the propagation delay on each line equal, thereby eliminating skewed input signals to the DUTs. The capacitors also minimize capacitive cross-talk between the plurality of distributed transmission lines. The distributed transmission line network includes a driver with an internal resistance that is much less than the characteristic impedance of the distributed transmission line to minimize the voltage drop at the driver. The distributed transmission line also includes an input RC network for speeding rise time and a termination RC network for minimizing reflections in the distributed transmission line.

Abstract: The invention includes directing an analog electrical signal through a plurality of discrete time delays in order to sequentially introduce cumulative time delays to the electrical signal. The magnitudes of the electrical signal before and after the introduction of each of the time delays are compared, and a plurality of pulse signals are generated in response to the comparisons. Logic circuitry is responsive to the logic conditions of the pulse signals to generate output signals indicative of the amplitude peaks or slopes of the electrical signal.