Patents by Inventor Wai Lok Lee

Wai Lok Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6548413
    Abstract: A new method of etching metal lines with reduced microloading effect is described. Semiconductor device structures are provided in and on a semiconductor substrate and covered with an insulating layer. A barrier metal layer is deposited overlying the insulating layer and a metal layer is deposited overlying the barrier metal layer. The metal layer is covered with a photoresist mask wherein there are both wide spaces and narrow spaces between portions of the photoresist mask. The metal layer is etched away where it is not covered by the photoresist mask wherein the barrier metal layer is reached within the wide spaces while some of the metal layer remains within the narrow spaces. The metal layer remaining within the narrow spaces is selectively etched away. Thereafter, the barrier metal layer not covered by the photoresist mask is etched away wherein the insulating layer is reached within the wide spaces while some of the barrier metal layer remains within the narrow spaces.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: April 15, 2003
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Paul Kwok Keung Ho, Thomas Schulue, Raymond Joy, Wai Lok Lee, Ramasamy Chockalingam, Ba Tuan Pham, Premachandran Vayalakkara