Abstract: A semiconductor device includes a device cell including a gate component configured to receive a gate control signal and a temperature sensing component adjacent to the device cell. Each of the temperature sensing component and the gate component includes polycrystalline silicon.

Abstract: One embodiment provides a semiconductor device. The device comprises a substrate having a first face and a second face, a well region, a source region disposed in the well region, a contact region contacting the well region and the source region, a Schottky region, and a source metal layer. A first part of the source metal layer contacts the Schottky region to form a Schottky diode. The Schottky region is surrounded by the contact region and the well region in a first plane perpendicular to a direction from the first face toward the second face.

Abstract: One embodiment provides a semiconductor device. The device comprises a substrate having a first face and a second face, a well region, a source region disposed in the well region, a contact region contacting the well region and the source region, a Schottky region, and a source metal layer. A first part of the source metal layer contacts the Schottky region to form a Schottky diode. The Schottky region is surrounded by the contact region and the well region in a first plane perpendicular to a direction from the first face toward the second face.

Abstract: A semiconductor device includes a device cell including a gate component configured to receive a gate control signal and a temperature sensing component adjacent to the device cell. Each of the temperature sensing component and the gate component includes polycrystalline silicon.

Abstract: A Schottky device includes a silicon carbide (SiC) substrate of a first conductivity type, a drift layer of the first conductivity type, a trench, a barrier layer of a second conductivity type, an electrically conductive material that at least partially fills the trench and contacts the barrier layer, a first electrode, and a second electrode. The drift layer is formed of SiC and is situated onto the SiC substrate. The trench extends from the top surface of the drift layer towards the SiC substrate. The barrier layer contacts the drifting layer and covers a sidewall and a bottom wall of the trench. The first electrode forms a Schottky junction with the drift layer and forms a low resistivity contact with the barrier layer and the electrically conductive material. The second electrode forms an ohmic contact with the SiC substrate.

Abstract: One embodiment provides a semiconductor device. The device comprises a substrate having a first face and a second face, a well region, a source region disposed in the well region, a contact region contacting the well region and the source region, a Schottky region, and a source metal layer. A first part of the source metal layer contacts the Schottky region to form a Schottky diode. The Schottky region is surrounded by the contact region and the well region in a first plane perpendicular to a direction from the first face toward the second face.

Abstract: A Schottky device includes a silicon carbide (SiC) substrate of a first conductivity type, a drift layer of the first conductivity type, a trench, a barrier layer of a second conductivity type, an electrically conductive material that at least partially fills the trench and contacts the barrier layer, a first electrode, and a second electrode. The drift layer is formed of SiC and is situated onto the SiC substrate. The trench extends from the top surface of the drift layer towards the SiC substrate. The barrier layer contacts the drifting layer and covers a sidewall and a bottom wall of the trench. The first electrode forms a Schottky junction with the drift layer and forms a low resistivity contact with the barrier layer and the electrically conductive material. The second electrode forms an ohmic contact with the SiC substrate.

Abstract: An exemplary method of making a semiconductor device includes providing a semiconductor layer of a first conductivity type, providing a first hard mask on a surface of the semiconductor layer, patterning the first hard mask to obtain a patterned first hard mask to obtain an exposed surface of the semiconductor layer, forming a body region in the semiconductor layer by using the patterned first hard mask as mask, the body region being of a second conductivity type different from the first conductivity type, providing a second hard mask on the patterned first hard mask and the exposed surface of the semiconductor layer, patterning the second hard mask to obtain a patterned second hard mask, and forming a contact region and a sinker region by using the patterned first hard mask and the patterned second hard mask as mask.

Abstract: A Schottky device includes a silicon carbide (SiC) substrate of a first conductivity type, a drift layer of the first conductivity type, a trench, a barrier layer of a second conductivity type, an electrically conductive material that at least partially fills the trench and contacts the barrier layer, a first electrode, and a second electrode. The drift layer is formed of SiC and is situated onto the SiC substrate. The trench extends from the top surface of the drift layer towards the SiC substrate. The barrier layer contacts the drifting layer and covers a sidewall and a bottom wall of the trench. The first electrode forms a Schottky junction with the drift layer and forms a low resistivity contact with the barrier layer and the electrically conductive material. The second electrode forms an ohmic contact with the SiC substrate.

Abstract: A Schottky device includes a silicon carbide (SiC) substrate of a first conductivity type, a drift layer of the first conductivity type, a trench, a barrier layer of a second conductivity type, an electrically conductive material that at least partially fills the trench and contacts the barrier layer, a first electrode, and a second electrode. The drift layer is formed of SiC and is situated onto the SiC substrate. The trench extends from the top surface of the drift layer towards the SiC substrate. The barrier layer contacts the drifting layer and covers a sidewall and a bottom wall of the trench. The first electrode forms a Schottky junction with the drift layer and forms a low resistivity contact with the barrier layer and the electrically conductive material. The second electrode forms an ohmic contact with the SiC substrate.

Abstract: An exemplary method of making a semiconductor device includes providing a semiconductor layer of a first conductivity type, providing a first hard mask on a surface of the semiconductor layer, patterning the first hard mask to obtain a patterned first hard mask to obtain an exposed surface of the semiconductor layer, forming a body region in the semiconductor layer by using the patterned first hard mask as mask, the body region being of a second conductivity type different from the first conductivity type, providing a second hard mask on the patterned first hard mask and the exposed surface of the semiconductor layer, patterning the second hard mask to obtain a patterned second hard mask, and forming a contact region and a sinker region by using the patterned first hard mask and the patterned second hard mask as mask.

Abstract: A Schottky device includes a silicon carbide (SiC) substrate of a first conductivity type, a drift layer of the first conductivity type, a trench, a barrier layer of a second conductivity type, an electrically conductive material that at least partially fills the trench and contacts the barrier layer, a first electrode, and a second electrode. The drift layer is formed of SiC and is situated onto the SiC substrate. The trench extends from the top surface of the drift layer towards the SiC substrate. The barrier layer contacts the drifting layer and covers a sidewall and a bottom wall of the trench. The first electrode forms a Schottky junction with the drift layer and forms a low resistivity contact with the barrier layer and the electrically conductive material. The second electrode forms an ohmic contact with the SiC substrate.

Abstract: An isolation structure formed in a semiconductor substrate of a first conductivity type includes a region of a second conductivity type opposite to the first conductivity type. The region of the second conductivity type is saucer-shaped and has a floor portion substantially parallel to the top surface of the substrate and a sloped sidewall portion. The sloped sidewall portion extends downward from the top surface of the substrate at an oblique angle and merges with the floor portion. The floor portion and the sloped sidewall portion together form an isolated pocket of the substrate.

Abstract: An isolation structure formed in a semiconductor substrate of a first conductivity type includes a floor isolation region of a second conductivity type opposite to the first conductivity type submerged in the substrate. A first trench extends downward from a surface of the substrate and overlaps onto the floor isolation region. The first trench includes walls lined with a dielectric material and contains a conductive material. The first trench and the floor isolation region electrically isolate a pocket of the first conductivity type from the substrate.

Abstract: Isolation structures for isolating semiconductor devices from a substrate include floor isolation regions buried within the substrate and one or more trenches extending from a surface of the substrate to the buried floor isolation region.

Abstract: An isolation structure formed in a semiconductor substrate of a first conductivity type includes a floor isolation region of a second conductivity type opposite to the first conductivity type submerged in the substrate. A first trench extends downward from a surface of the substrate and overlaps onto the floor isolation region. The first trench includes walls lined with a dielectric material and contains a conductive material. The first trench and the floor isolation region electrically isolate a pocket of the first conductivity type from the substrate.

Abstract: An isolation structure formed in a semiconductor substrate of a first conductivity type includes a region of a second conductivity type opposite to the first conductivity type. The region of the second conductivity type is saucer-shaped and has a floor portion substantially parallel to the top surface of the substrate and a sloped sidewall portion. The sloped sidewall portion extends downward from the top surface of the substrate at an oblique angle and merges with the floor portion. The floor portion and the sloped sidewall portion together form an isolated pocket of the substrate.

Abstract: Isolation structures for isolating semiconductor devices from a substrate include floor isolation regions buried within the substrate and one or more trenches extending from a surface of the substrate to the buried floor isolation region.

Abstract: A variety of isolation structures for semiconductor substrates include a trench formed in the substrate that is filled with a dielectric material or filled with a conductive material and lined with a dielectric layer along the walls of the trench. The trench may be used in combination with doped sidewall isolation regions. Both the trench and the sidewall isolation regions may be annular and enclose an isolated pocket of the substrate. The isolation structures are formed by modular implant and etch processes that do not include significant thermal processing or diffusion of dopants so that the resulting structures are compact and may be tightly packed in the surface of the substrate.

Abstract: An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.