Patents by Inventor Wai Keung Ho
Wai Keung Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990394Abstract: A semiconductor package including a lead frame, an Ag plated surface positioned on the lead frame, an adhesion promotion layer positioned on the top of the Ag plated surface, and mold body covering the top of the lead frame is provided. The Ag plated surface covers a significant part of an interconnection area of the lead frame surface, and the Ag plating surface does not exceed the area of the mold body.Type: GrantFiled: September 15, 2021Date of Patent: May 21, 2024Assignee: Nexperia B.V.Inventors: Kim Ng, On Lok Chau, Wai Keung Ho, Raymond Wong
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Publication number: 20220084919Abstract: A semiconductor package including a lead frame, an Ag plated surface positioned on the lead frame, an adhesion promotion layer positioned on the top of the Ag plated surface, and mold body covering the top of the lead frame is provided. The Ag plated surface covers a significant part of an interconnection area of the lead frame surface, and the Ag plating surface does not exceed the area of the mold body.Type: ApplicationFiled: September 15, 2021Publication date: March 17, 2022Applicant: NEXPERIA B.V.Inventors: Kim NG, On Lok CHAU, Wai Keung HO, Raymond WONG
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Patent number: 9847283Abstract: A semiconductor device has wettable corner leads. A semiconductor die is mounted on a lead frame. Die bonding pads are electrically connected to leads of the lead frame. The die and electrical connections are encapsulated with a mold compound. The leads are exposed and flush with the corners of the device. The leads include dimples so that they are wettable, which facilitates inspection when the device is mounted on a circuit board or substrate.Type: GrantFiled: November 6, 2016Date of Patent: December 19, 2017Assignee: Nexperia B.V.Inventors: Xue Ke, Kan Wae Lam, Sven Walczyk, Wai Keung Ho, Wing Onn Chaw
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Patent number: 7301225Abstract: A lead frame (10) for a semiconductor device includes a first row of terminals (12) surrounding a die receiving area (14) and a second row of terminals (16) spaced from and surrounding the first row of terminals (12). The first and second rows of terminals (12, 16) have a first height (H1). The terminals (12) of the first row include a step (26) that has a greater height (H2). Bond wires (36) connecting die pads (34) to the first row terminals (12) extend over the second height H2 part of the terminal (12) and are attached to the first height H1 part of the terminal (12). The step (26) insures that the bond wires (36) attached to the stepped terminals (12) have a high wire kink profile so that they are less susceptible to damage in later process steps.Type: GrantFiled: February 28, 2006Date of Patent: November 27, 2007Assignee: Freescale Semiconductor, Inc.Inventors: Fei Ying Wong, Wai Keung Ho, Ho Wang Wong
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Patent number: 6958261Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.Type: GrantFiled: October 14, 2003Date of Patent: October 25, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
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Patent number: 6875635Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.Type: GrantFiled: March 29, 2004Date of Patent: April 5, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
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Patent number: 6798074Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.Type: GrantFiled: March 4, 2002Date of Patent: September 28, 2004Assignee: Motorola, Inc.Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
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Publication number: 20040178511Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.Type: ApplicationFiled: March 29, 2004Publication date: September 16, 2004Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
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Publication number: 20040080029Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.Type: ApplicationFiled: October 14, 2003Publication date: April 29, 2004Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
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Patent number: 6667543Abstract: An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.Type: GrantFiled: October 29, 2002Date of Patent: December 23, 2003Assignee: Motorola, Inc.Inventors: Wai Wong Chow, Man Hon Cheng, Wai Keung Ho
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Publication number: 20030164553Abstract: A semiconductor device 30 includes a base carrier 32, an adhesive material layer 36 and an integrated circuit die 34. The base carrier 32 has a top side and a bottom side, the top side having a central area for receiving the die 34 and a peripheral area surrounding the central area. The adhesive material layer 36 is disposed on the top side of the base carrier in an “X” shaped pattern. The “X” shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die 34 is attached to the base carrier 32 with the adhesive material layer 36 at the central area. Even after attachment of the die 34, the adhesive material 36 extends well beyond the die 34 and the central area into the peripheral area.Type: ApplicationFiled: March 4, 2002Publication date: September 4, 2003Inventors: Man Hon Cheng, Wai Wong Chow, Wai Keung Ho
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Patent number: 5793123Abstract: The disclosure concerns an electronic device, for example a radio-alarm clock, that can be powered from the mains power supply or from batteries and can operate without interruption when changing from one of these power supplies to the other. It comprises a support connected to the mains and a mobile part that can be placed in electrical contact with said support and that includes at least one electronic circuit requiring power. This electronic circuit is powered from the mains via a first diode when said mobile part is placed in electrical contact with said support, and is powered by at least one battery via a second diode when said mobile part is removed from said support.Type: GrantFiled: June 20, 1995Date of Patent: August 11, 1998Assignee: Thomson Multimedia S.A.Inventors: Wai Keung Ho, Michel Grossier, Jacques Mingot