Abstract: In an image sensor provided with an AD conversion circuit in each column, the offset value of each AD conversion circuit disposed in each column is corrected, using a value based on the output in each column of a plurality of lines composed of shielded pixels in order to provide an effective method for reducing vertically-striped noise due to the variation of the offset element of the AD conversion circuit.

Abstract: In a single-to-differential conversion circuit for converting a single signal into a differential signal formed of first and second signal components: a source-grounded (or emitter-grounded) first transistor receives the single signal at the drain (or collector); the gate (or base) and drain (or collector) of the first transistor are connected; the gate (or base) of a source-grounded (or emitter-grounded) second transistor is connected to the gate (or base) of the first transistor; the drain (or collector) of a gate-grounded (or base-grounded) third transistor outputs the first signal component; the source (or emitter) of the third transistor is connected to the drain (or collector) of the first transistor; the drain (or collector) of a gate-grounded (or base-grounded) fourth transistor outputs the second signal component; and the source (or emitter) of the fourth transistor is connected to the drain (or collector) of the second transistor.

Abstract: In a single-to-differential conversion circuit for converting a single signal into a differential signal formed of first and second signal components: a source-grounded (or emitter-grounded) first transistor receives the single signal at the drain (or collector); the gate (or base) and drain (or collector) of the first transistor are connected; the gate (or base) of a source-grounded (or emitter-grounded) second transistor is connected to the gate (or base) of the first transistor; the drain (or collector) of a gate-grounded (or base-grounded) third transistor outputs the first signal component; the source (or emitter) of the third transistor is connected to the drain (or collector) of the first transistor; the drain (or collector) of a gate-grounded (or base-grounded) fourth transistor outputs the second signal component; and the source (or emitter) of the fourth transistor is connected to the drain (or collector) of the second transistor.