Abstract: In some examples, apparatus comprises a multiplexer (MUX) adapted to be coupled to a set of battery cells and configured to provide a voltage of a different battery cell in the set of battery cells based on a MUX control signal. Apparatus comprises a comparator coupled to the MUX and configured to compare a MUX output signal to a threshold voltage to provide a comparator output signal. Apparatus comprises a digital control circuit configured to provide the MUX control signal to the MUX, to store the comparator output signal, and to use a logic AND gate to provide an AND gate output signal based on the stored comparator output signal.

Abstract: In some examples, apparatus comprises a multiplexer (MUX) adapted to be coupled to a set of battery cells and configured to provide a voltage of a different battery cell in the set of battery cells based on a MUX control signal. Apparatus comprises a comparator coupled to the MUX and configured to compare a MUX output signal to a threshold voltage to provide a comparator output signal. Apparatus comprises a digital control circuit configured to provide the MUX control signal to the MUX, to store the comparator output signal, and to use a logic AND gate to provide an AND gate output signal based on the stored comparator output signal.

Abstract: The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating.

Abstract: The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator.

Abstract: A relatively low frequency chopping operation is applied to a delta-sigma ADC to reduce DC offsets resulting from non-ideal component operation. Sequential chopping takes place outside a closed loop and may include an inverted polarity feedback for a part of the chopping period. Nested chopping involves chopping within the closed loop, and may include an inverted polarity feedback and a time shift. The feedback compensation for sequential and nested chopping permits the correct polarity feedback to be provided at the desired time in conjunction with sampling and quantization events. Integrating capacitor(s) may be swapped in relative polarity during nested chopping to preserve residual conversion information for the desired polarity. The ADC operation is non-temperature dependent and avoids modification to the useful signal, resulting in higher accuracy.

Abstract: The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating.

Abstract: The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator.

Abstract: A relatively low frequency chopping operation is applied to a delta-sigma ADC to reduce DC offsets resulting from non-ideal component operation. Sequential chopping takes place outside a closed loop and may include an inverted polarity feedback for a part of the chopping period. Nested chopping involves chopping within the closed loop, and may include an inverted polarity feedback and a time shift. The feedback compensation for sequential and nested chopping permits the correct polarity feedback to be provided at the desired time in conjunction with sampling and quantization events. Integrating capacitor(s) may be swapped in relative polarity during nested chopping to preserve residual conversion information for the desired polarity. The ADC operation is non-temperature dependent and avoids modification to the useful signal, resulting in higher accuracy.

Abstract: A battery detect circuit (32) is provided that is operable to dispose a sense resistor (50) in series with the battery to determine whether the charge is being provided to the battery or being extracted from the battery. The voltage across the sensor resistor (50) is sensed by a voltage/frequency converter (52). The voltage/frequency converter (52) is a differential structure comprised of two integrator structures (102) and (104) that are operable to utilize a switched capacitor configuration to drive comparators on the output thereof. Each of the integrator structures (102) and (104) has associated therewith passive elements and active elements. The integrators (102) and (104) have associated therewith integration capacitors (147) and (149). Additionally, there are two operational amplifiers (143) and (145) that provide the active components of each of the integrators (102) and (104).

Abstract: A battery charging system is provided which is comprised of a battery pack (30) and a charging system (20). The battery pack (30) includes a battery (10) and a battery capacity detect circuit (32). The battery capacity detect circuit (32) having a memory is interfaced with the charging system (20) through a communication link to output a CHG-Bar signal. The battery capacity detect circuit (32) is operable to perform numerous monitoring operations on the battery by detecting the charge input to the battery and detecting charge taken away from the battery in a discharge operation. This operation is performed independent of the charging operation by the charging system (20). However, the charging operation of the charger (22) can be affected with the CHG-Bar signal.

Abstract: A battery charging system is provided which is comprised of a battery pack (30) and a charging system (20). The battery pack (30) includes a battery (10) and a battery capacity detect circuit (32). The battery capacity detect circuit (32) is interfaced with the charging system (20) through a single line to output a CHG-Bar signal. The battery capacity detect circuit (32) is operable to perform numerous monitoring operations on the battery by detecting the charge input to the battery and detecting charge taken away from the battery in a discharge operation. This operation is performed independent of the charging operation by the charging system (20). However, the charging operation of the charger (22) can be affected with the CHG-Bar signal.

Abstract: A battery charge/discharge monitor circuit (10) is operable to be disposed in a battery pack (12) which can be connected to a battery (13). The monitor circuit (10) is operable to be connected to an external CPU (24) or similar system through a single wire communication port (22) for transferring information back and forth. There is also provided an external signal on a line (30) for indicating charge or discharge activity in the monitor circuit (10). The monitor circuit (10) is operable to collect information regarding the amount of charge input to the battery and the length of time that the charge is input to the battery and also the amount of charge that is removed from the battery and the length of time that the charge is removed. This information is stored in a memory block (62) for later access by the external CPU (24). This system also provides offset information to provide some type of compensation for non-linearities of the part.

Abstract: A temperature compensated current source for driving a multi-vibrator (19) includes a voltage generator (10) that outputs a voltage that is proportional to absolute temperature (PTAT) and a resistor (12) for setting the current output by the voltage generator (10). The temperature coefficient of the resistor (12) is chosen such that any variations in the current supplied by the voltage generator (10) are compensated for to result in a current that has substantially no temperature variation. This current is mirrored to a current source (18) for driving the multi-vibrator (19). The voltage across the resistor (12) is a function of temperature, with the current being a function of the value of the resistor (12). The temperature coefficient of the resistor (12) is substantially equal to the temperature coefficient of the voltage generator (10) to yield a temperature coefficient of substantially 0 ppm/.degree. C. for the current.