Abstract: A digital video network interface for transferring isochronous video data over an asynchronous local area network, including an isochronous interface for transmitting digital video data isochronously, a memory comprising first and second buffers for storing the isochronous video data, a network interface for transmitting video data from either the first or second buffers over the asynchronous local area network, and a memory buffer manager for controlling the output of the video data over the asynchronous local area network and for controlling the input/output of video data into/from the first or second buffers, wherein, when either the first or second buffers is filled with video data, the memory buffer manager shifts the input of data into an empty buffer and begins outputting video data to the asynchronous local area network from a filled buffer, upon receiving access to the local area network.

Abstract: Method and apparatus for interfacing a printer to a local area network includes the use of an interactive network board coupling the printer to the LAN. A bi-directional printer interface is disposed on the board and transmits print data to the printer, and receives printer status data from the printer. ALAN interface is disposed on the board for receiving print job information and printer status requests from the LAN, and for transmitting printer status information to the LAN. A ROM is disposed on the board and stores (i) application programs which receive the print job information and transmit the print data to the printer, and (ii) status and control programs which receive the printer status requests from the LAN, receive printer status data from the printer, transmit the printer status information to the LAN, and receive control information from the LAN and transmit it to the printer. A processor disposed on the board executes both the application programs and the status and control programs.

Abstract: Method and apparatus for loading a ROM image into PROM comprises loading a ROM image into a dynamic random access memory, verifying the accuracy of the ROM image in the dynamic random access memory, and receiving a command to flash EPROM with the stored ROM image. A hardware interlock mechanism is deactivated by a two-step command procedure so as to enable flashing the EPROM. Specifically, a predetermined bit pattern is written to a first predetermined address on an address bus, one bit being latched to cause a flash signal to be output to a transistor switch and to be pre-loaded at a flip flop. A second predetermined address is read from so as to clock the flip flop. The output of the flip flop closes the transistor switch allowing the flash enable signal to reach the EPROM. The EPROM is erased, after which the ROM image is loaded into the PROM.