Abstract: The present disclosure is directed to a method and system for increasing virtual machine (VM) density on a server system through adaptive rendering by dynamically shifting video rendering tasks to a client computing device. In one embodiment, a processor in a server manages virtual machines in the server by controlling a number of VMs and an amount of system resources allocated to the VMs. The number of VMs and the amount of resources allocated to the VMs are controlled by shifting video rendering from at least one of the VMs to a client device, and increasing the number of the VMs in the server after the shifting.

Abstract: The present disclosure is directed to a method and system for increasing virtual machine (VM) density on a server system through adaptive rendering by dynamically shifting video rendering tasks to a client computing device. In one embodiment, a processor in a server manages virtual machines in the server by controlling a number of VMs and an amount of system resources allocated to the VMs. The number of VMs and the amount of resources allocated to the VMs are controlled by shifting video rendering from at least one of the VMs to a client device, and increasing the number of the VMs in the server after the shifting.

Abstract: The present disclosure is directed to a method to increase virtual machine density on a server system through adaptive rendering by dynamically determining when to shift video rendering tasks between the server system and a client computing device. In another embodiment, the adaptive rendering, using various parameters, can select one or more encoding and compression algorithms to use to prepare and process the video for transmission to the client computing device. In another embodiment, a video rendering system is disclosed that can adaptively alter how and where a video is rendered, encoded, and compressed.

Abstract: One aspect of the current disclosure provides a method of upscaling an image. The method includes: rendering an image, wherein the rendering includes generating color samples of the image at a first resolution and depth samples of the image at a second resolution, which is higher than the first resolution; and upscaling the image to an upscaled image at a third resolution, which is higher than the first resolution, using the color samples and the depth samples.

Abstract: The present disclosure is directed to a method to increase virtual machine density on a server system through adaptive rendering by dynamically determining when to shift video rendering tasks between the server system and a client computing device. In another embodiment, the adaptive rendering, using various parameters, can select one or more encoding and compression algorithms to use to prepare and process the video for transmission to the client computing device. In another embodiment, a video rendering system is disclosed that can adaptively alter how and where a video is rendered, encoded, and compressed.

Abstract: One aspect of the current disclosure provides a method of upscaling an image. The method includes: rendering an image, wherein the rendering includes generating color samples of the image at a first resolution and depth samples of the image at a second resolution, which is higher than the first resolution; and upscaling the image to an upscaled image at a third resolution, which is higher than the first resolution, using the color samples and the depth samples.

Abstract: A method for performing index compression. The method includes identifying a tile in an image, wherein the image comprises a plurality of tiles, wherein each tile includes color associated with a plurality of pixels. Furthermore, the method includes generating a plurality of indices located throughout the tile, and storing the plurality of indices. Additionally, the method includes offsetting zero or more locations of an index of the plurality of indices from a pixel location.

Abstract: A method for performing index compression. The method includes identifying a tile in an image, wherein the image comprises a plurality of tiles, wherein each tile includes color associated with a plurality of pixels. Furthermore, the method includes generating a plurality of indices located throughout the tile, and storing the plurality of indices. Additionally, the method includes offsetting zero or more locations of an index of the plurality of indices from a pixel location.

Abstract: Circuits, methods, and apparatus that provide texture caches and related circuits that store and retrieve texels in a fast and efficient manner. One such texture circuit provides an increased number of bilerps for each pixel in a group of pixels, particularly when trilinear or aniso filtering is needed. For trilinear filtering, texels in a first and second level of detail are retrieved for a number of pixels during a clock cycle. When aniso filtering is performed, multiple bilerps can be retrieved for each of a number of pixels during one clock cycle.

Abstract: A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.

Abstract: A camshaft for an internal combustion engine includes a cam lobe for actuating a valve. The cam lobe has an opening ramp profile that acts to loft the valve gear away from contact with the cam lobe to a maximum lift of the valve, with the valve gear returning to contact with a closing ramp of the cam lobe sufficiently in advance of a minimum cam lobe closing ramp height so as to dissipate enough closing energy of the valve to minimize valve bounce after the valve contacts a corresponding valve seat.

Abstract: Floating-point texture filtering units leverage existing fixed-point filter circuits. Groups of floating-point texture values are converted to products of a fixed-point mantissa and a scaling factor that is the same for each texture value in the group. The fixed-point mantissas are filtered using a fixed-point filter circuit, and the filtered mantissa is combined with the scaling factor to determine a floating-point filtered value. Multiple floating-point filter results may be combined in a floating-point accumulator circuit. The same fixed-point filter circuit may also be used to filter fixed-point texture data by providing fixed-point input path that bypasses the format conversion and a fixed-point accumulator.

Abstract: Shortening a footprint is a technique to reduce the number of texture samples anisotropically filtered to determine a texture value associated with a graphics fragment. Reducing the number of texture samples anisotropically filtered reduces the number of texture samples read and simplifies the filter computation. Programmable knobs are used to shorten the footprint of a pixel in texture space thereby reducing the number of texture samples used during anisotropic filtering. These knobs permit a user to determine a balance between improved texture map performance and anisotropic texture filtering quality.

Abstract: A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.

Abstract: A graphics processing system performs filtering of oversampled data during a scanout operation. Sample values are read from an oversampled frame buffer and filtered during scanout; the filtered color values (one per pixel) are provided to a display device without an intervening step of storing the filtered data in a frame buffer. In one embodiment, the filtering circuit includes a memory interface configured to read data values corresponding to sample points from a frame buffer containing the oversampled data; and a filter configured to receive the data values provided by the memory interface, to compute a pixel value from the data values, and to transmit the pixel value for displaying by a display device, wherein the filter computes the pixel value during a scanout operation.

Abstract: A method and graphics accelerator apparatus for pipelined generation of output values for a sequence of pixels, with generation of output values for each of at least two textured pixels during each pipeline clock interval. The apparatus includes a combiner stage capable of producing output values during each clock interval of the pipeline, wherein the output values are indicative of a blend of a plurality of textures with a single pixel when the combiner stage operates in a first mode, and the output values are indicative of a blend of an individual texture with two pixels when the combiner stage operates in a second mode.

Abstract: A graphics pipeline including a rasterizing stage producing diffuse color values; a plurality of texture stages producing texture values defining a particular texture; a combiner stage for combining four of a plurality of selectable input values including diffuse color values, texture values furnished by a plurality of texture stages, and proportions for combination of the selectable input values; the combiner stage being capable of providing a result equivalent to a sum of products of any two sets of input values, and a product of two input values.

Abstract: A graphics accelerator pipeline including a combiner stage capable of producing output values during each clock interval of the pipeline which map a plurality of textures to a single pixel or an individual texture to two pixels.

Abstract: A system and method that avoids performance bottlenecks at the host processor while avoiding tearing of the displayed image. In one embodiment, the system is composed of the host processor, a first in first out (FIFO) buffer, a co-processor, multiple frame buffers, a display controller and a display. The host and the co-processor are configured to enable the host to selectively batch graphic commands to the co-processor. The small set of commands provides the flexibility to selectively batch commands and selectively synchronize the host processor to the co-processor.