Abstract: The invention relates to a method of generating a random-number sequence, and to a random-number generator, particularly for a chip card or a smart card.

Abstract: The invention relates to a detector circuit (100) for detecting short-lasting voltage pulses (spikes) in a power supply voltage (VDD). An integrator (INT) forms the average value (VDD_AV) of the power supply voltage (VDD) and a corresponding energy is stored in a first memory (MEM1). A comparator (COMP) compares the power supply voltage (VDD) with a predetermined voltage interval ([Vref1, Vref2]) and closes a switch (S) when the power supply voltage is outside this interval. The energy from the first memory (MEM1) then flows into a second memory (MEM2) via the switch (S) and a delay circuit (DELAY). When the energy in the second memory (MEM2) exceeds a threshold value, an output stage (OUT) is thereby activated, whose output supplies a signal (SPIKE_DET) indicating a voltage spike.

Abstract: The invention relates to a detector circuit (100) for detecting short-lasting voltage pulses (spikes) in a power supply voltage (VDD). An integrator (INT) forms the average value (VDD_AV) of the power supply voltage (VDD) and a corresponding energy is stored in a first memory (MEM1). A comparator (COMP) compares the power supply voltage (VDD) with a predetermined voltage interval ([Vref1, Vref2]) and closes a switch (S) when the power supply voltage is outside this interval. The energy from the first memory (MEM1) then flows into a second memory (MEM2) via the switch (S) and a delay circuit (DELAY). When the energy in the second memory (MEM2) exceeds a threshold value, an output stage (OUT) is thereby activated, whose output supplies a signal (SPIKE_DET) indicating a voltage spike.

Abstract: To provide an electric or electronic circuit arrangement (100) and a method of protecting at least a chip arrangement (200), for example, at least a (semiconductor) chip arrangement, particularly at least a controller chip arrangement for a chip card or smart card from manipulation and/or abuse, in which an optical attack by means of light irradiation on a controller chip arrangement itself and on a dielectric coating, particularly an insulating layer and/or passivation layer and/or further protective coating covering the controller chip arrangement for protecting the integrated circuit from external influences, both on the front side of the controller chip arrangement and on the substantially unprotected rear side of the controller chip arrangement can be reliably and permanently averted,

Abstract: To provide an electric or electronic circuit arrangement (100), it is proposed that at least one signal-generating unit (40), particularly at least an oscillator unit is connected to the contact terminals (22, 27) of the integrated circuit, the output frequency (fmeas.) of which unit is substantially determined by the specific capacitance (C), the signal-generating unit (40) precedes at least a first counting unit (50) which is clocked at the output frequency (fmeas.

Abstract: The invention relates to a method of generating a random-number sequence, and to a random-number generator, particularly for a chip card or a smart card.

Abstract: Contactless transmission of information from a passive transponder to a base station takes place in known manner by load modulation in the transponder. The coils of resonant circuits in the base station and in the transponder are coupled to one another, both resonant circuits being tuned as well as possible to the carrier frequency of the base station so that the load modulation of the resonant circuit in the transponder influences the current in the resonant circuit of the base station. Because the two resonant circuits often are not tuned exactly to one another in practice and the transponder is also liable to be moved during the information transmission, it may occur that no signal is recovered by conventional demodulation in the base station.