Abstract: A thin-film electroluminescent panel which has a light sink layer deposited immediately behind the phosphor layer thereof is modified to have a light emission enhancing dielectric layer deposited between the phosphor layer and the light sink layer. The light emission enhancing dielectricphosphor interface provides for injecting hot electrons for impact-exciting the luminescent centers in the phosphor to enable the panel to generate light when the front electrode of the panel is positive in potential. Moreover, the light emission enhancing dielectric layer is formed of a material having the same index of refraction as the phosphor layer so that it will pass the incident ambient light and the rearwardly directed light generated in the phosphor layer without reflection into the light sink layer wherein it is trapped by internal reflection and absorbed.

Abstract: A plurality of memory sections is provided each storing binary data to be employed for refreshing picture elements of a thin-film EL matrix display panel on successive frame time periods constituting an integration time period. The number of frame time periods in an integration time period corresponds to the number of different shades to be displayed on the panel. The binary data stored in each of the memory sections differs. Thus, when the binary data in the memory sections are read out on successive frame time periods, some of the picture elements on the panel are refreshed more than others during the integration time period. Accordingly, the eye of the viewer receives more light from some picture elements than others during each integration time period which results in the relative brightness levels and, therefore, the shades of the picture elements to vary.

Abstract: A mounting unit for a thin-film EL panel includes a substrate provided with cross-grid electrodes on the back surface thereof having aligned terminals located along the marginal sides thereof and a printed circuit board provided with a plurality of conductive paths on the front surface thereof having aligned end portions located along the side portions thereof. The printed circuit board is provided with plated-through connecting holes and routing holes. Some of the conductive paths on the front surface of the printed circuit board are connected to some of the connecting holes and others of the conductive paths are connected to the routing holes. The back surface of the printed circuit board is provided with conductive paths connecting the routing holes to others of the connecting holes. Plug connectors for electrical circuit means are positioned on the back of the printed circuit board with their leads respectively connected to the connecting holes.