Patents by Inventor Walter Forder

Walter Forder has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Circuit configuration for protecting an electronic circuit against overload
    Patent number: 5027181
    Abstract: A circuit configuration for protecting electronic circuits against overload of a supply voltage source includes a voltage-limiting configuration, such as a Zener diode. A depletion layer field effect transistor is connected upstream of the voltage-limiting configuration and has interconnected gate and source terminals.
    Type: Grant
    Filed: June 8, 1990
    Date of Patent: June 25, 1991
    Assignee: Siemens Aktiengesellschaft
    Inventors: Joost Larik, Walter Forder