Patents by Inventor Walter Francis Bridgewater

Walter Francis Bridgewater has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6480022
    Abstract: A low-voltage differential dual receiver for a SCSI bus uses a symmetrical driver by doing without a termination bias voltage. The data phase and protocol phase of SCSI communication are separated by using two receivers and optimizing each receiver for its particular function. A high-speed receiver is used when transmitting data at high-speeds, and a lower performance, low-speed receiver is used for other SCSI phases. A built-in offset allows the low-speed receiver to operate correctly during bus arbitration. The built-in offset in the low-speed receiver takes the place of the termination bias voltage in a traditional SCSI bus and is implemented in a variety of ways.
    Type: Grant
    Filed: September 26, 2001
    Date of Patent: November 12, 2002
    Assignee: Adaptec, Inc.
    Inventor: Walter Francis Bridgewater, Jr.
  • Publication number: 20020017920
    Abstract: A low-voltage differential dual receiver for a SCSI bus uses a symmetrical driver by doing without a termination bias voltage. The data phase and protocol phase of SCSI communication are separated by using two receivers and optimizing each receiver for its particular function. A high-speed receiver is used when transmitting data at high-speeds, and a lower performance, low-speed receiver is used for other SCSI phases. A built-in offset allows the low-speed receiver to operate correctly during bus arbitration. The built-in offset in the low-speed receiver takes the place of the termination bias voltage in a traditional SCSI bus and is implemented in a variety of ways. In a first embodiment, an N-well generation circuit produces a bulk voltage for one transistor of the differential transistor pair that is different than a supply voltage supplied to the bulk of the other transistor.
    Type: Application
    Filed: September 26, 2001
    Publication date: February 14, 2002
    Applicant: Adaptec, Inc.
    Inventor: Walter Francis Bridgewater
  • Patent number: 6307401
    Abstract: A low-voltage differential dual receiver for a SCSI bus uses a symmetrical driver by doing without a termination bias voltage. The data phase and protocol phase of SCSI communication are separated by using two receivers and optimizing each receiver for its particular function. A high-speed receiver is used when transmitting data at high-speeds, and a lower performance, low-speed receiver is used for other SCSI phases. A built-in offset allows the low-speed receiver to operate correctly during bus arbitration. The built-in offset in the low-speed receiver takes the place of the termination bias voltage in a traditional SCSI bus and is implemented in a variety of ways. In a first example, an N-well generation circuit produces a bulk voltage for one transistor of the differential transistor pair that is different than a supply voltage supplied to the bulk of the other transistor.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: October 23, 2001
    Assignee: Adaptec, Inc.
    Inventor: Walter Francis Bridgewater, Jr.
  • Patent number: 6222388
    Abstract: The first pulse problem for a low-voltage differential SCSI bus driver is remedied by supplying greater power for a first pulse of a bus line after a steady state condition. Activity detection circuitry detects when a signal has remained in a steady state for a number of bus cycles and enables an additional power boosting differential driver to deliver an appropriate amount of power for a limited amount of time in order to produce a quality first pulse while minimizing power output. The extra power needed to remedy the quality of the first pulse is only supplied for the duration of the first pulse so that the output driver strength is minimized and the total power over time that an integrated circuit must dissipate is reduced. In another embodiment, instead of greater than normal power being delivered for a first pulse, the output driver is decreased in its output drive strength while an output remains in a particular state.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: April 24, 2001
    Assignee: Adaptec, Inc.
    Inventor: Walter Francis Bridgewater, Jr.
  • Patent number: 6124727
    Abstract: A bias compensator circuit for significantly reducing an offset produced by a termination bias that is associated with a differential pair bus. The differential pair bus is connected to a driver. The bias compensator circuit includes: (a) a signal source connected to a first line of the differential pair; (b) a first switch for switching ON the signal source while the driver is driving; (c) a signal sink connected to a second line of the differential pair; and (d) a second switch for switching ON the signal sink while the driver is driving.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: September 26, 2000
    Assignee: Adaptec, Inc.
    Inventors: Walter Francis Bridgewater, Jr., William C. Gintz
  • Patent number: 6034551
    Abstract: A low-voltage differential dual receiver for a SCSI bus uses a symmetrical driver by doing without a termination bias voltage. The data phase and protocol phase of SCSI communication are separated by using two receivers and optimizing each receiver for its particular function. A high-speed receiver is used when transmitting data at high-speeds, and a lower performance, low-speed receiver is used for other SCSI phases. A built-in offset allows the low-speed receiver to operate correctly during bus arbitration. The built-in offset in the low-speed receiver takes the place of the termination bias voltage in a traditional SCSI bus and is implemented in a variety of ways. In a first example, an N-well generation circuit produces a bulk voltage for one transistor of the differential transistor pair that is different than a supply voltage supplied to the bulk of the other transistor.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: March 7, 2000
    Assignee: Adaptec, Inc.
    Inventor: Walter Francis Bridgewater, Jr.
  • Patent number: 5949253
    Abstract: The first pulse problem for a low-voltage differential SCSI bus driver is remedied by supplying greater power for a first pulse of a bus line after a steady state condition. Activity detection circuitry detects when a signal has remained in a steady state for a number of bus cycles and enables an additional power boosting differential driver to deliver an appropriate amount of power for a limited amount of time in order to produce a quality first pulse while minimizing power output. The extra power needed to remedy the quality of the first pulse is only supplied for the duration of the first pulse so that the output driver strength is minimized and the total power over time that an integrated circuit must dissipate is reduced. In another embodiment, instead of greater than normal power being delivered for a first pulse, the output driver is decreased in its output drive strength while an output remains in a particular state.
    Type: Grant
    Filed: October 6, 1997
    Date of Patent: September 7, 1999
    Assignee: Adaptec, Inc.
    Inventor: Walter Francis Bridgewater, Jr.