Patents by Inventor Walter Heinrich Demmer

Walter Heinrich Demmer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8195972
    Abstract: Synchronous circuitry for processing digital data in which the data are filtered to compensate for expected jitter in time-average frequency clock signals. Time-average frequency synthesis circuitry generates internal clock signals of a desired frequency, for example as based on a recovered clock signal from an input data stream, in a manner in which not all periods of the clock signal are of uniform duration. A jitter precorrection filter is inserted into the data path to apply a variable delay to pre-correct for distortion caused by jitter in the clock cycle. In embodiments of the invention using a flying-adder architecture to generate the clock signal, coefficients of the digital filer realizing the jitter precorrection filter are calculated according to the currently-selected oscillator phase and according to a fractional portion of a digital frequency control word.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: June 5, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Karl Renner, Walter Heinrich Demmer, Liming Xiu
  • Publication number: 20110131439
    Abstract: Synchronous circuitry for processing digital data in which the data are filtered to compensate for expected jitter in time-average frequency clock signals. Time-average frequency synthesis circuitry generates internal clock signals of a desired frequency, for example as based on a recovered clock signal from an input data stream, in a manner in which not all periods of the clock signal are of uniform duration. A jitter precorrection filter is inserted into the data path to apply a variable delay to pre-correct for distortion caused by jitter in the clock cycle. In embodiments of the invention using a flying-adder architecture to generate the clock signal, coefficients of the digital filer realizing the jitter precorrection filter are calculated according to the currently-selected oscillator phase and according to a fractional portion of a digital frequency control word.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 2, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Karl Renner, Walter Heinrich Demmer, Liming Xiu
  • Patent number: 7468763
    Abstract: System and method for an all-digital audio receiver for a BTSC MTS audio signal or other composite signal that is FM modulated. A preferred embodiment comprises a digital FM demodulator for receiving an analog to digital quantized SIF signal and performing demodulation and outputting a composite audio signal, and a digital audio processor for decomposing the composite audio signal into at least the SAP, stereo and monaural signals for audio reproduction. In a preferred embodiment, the digital audio processor is a programmable digital signal processor. In a preferred embodiment, the digital FM demodulator and the digital audio processor are implemented as an integrated circuit. Methods for processing the audio signal using the digital processors of the invention are provided.
    Type: Grant
    Filed: August 9, 2005
    Date of Patent: December 23, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Feng Ying, Karl Hertzian Renner, Weider Peter Chang, Shereef Shehata, Viet Dinh, Xiaodong Wu, Walter Heinrich Demmer
  • Patent number: 7362380
    Abstract: The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92), a loop filter (94), a vertical sync discrete time oscillator (DTO) (98), and an output logic (100) adapted to detect a vertical sync (222), wherein the loop filter (94), the vertical sync DTO (98), and the output logic (100) are coupled to the sync detector (92).
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: April 22, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Karl Renner, Walter Heinrich Demmer
  • Patent number: 7274406
    Abstract: The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92) adapted to output a phase error (152), a vertical sync discrete time oscillator (DTO) block (98) adapted to output a vertical sync DTO (130) based on the phase error (152), and an output logic (100) adapted to detect a vertical sync based on the vertical sync DTO (130).
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: September 25, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Karl Renner, Walter Heinrich Demmer
  • Patent number: 7173668
    Abstract: The present invention discloses a horizontal sync detector circuit (10) comprising a filter portion (12), an equilibrium accumulator portion (14) coupled to the filter portion (12), a horizontal sync detector portion (16) coupled to the filter portion (12) and to the equilibrium accumulator portion (14), and an output logic portion (18) coupled to the horizontal sync detector portion (16), the output logic portion (18) adapted to produce a phase error (116) based on a combination of a coarse phase error (108) and a fine phase error (112).
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: February 6, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Karl Renner, Walter Heinrich Demmer, Jason M. Meiners, Weider Peter Chang, Airong Amy Zhang
  • Patent number: 6956617
    Abstract: A low-order polyphase interpolation filter, such as for decoding video and image signals, employs interpolation to facilitate sample rate conversion from a first rate to a second rate, which can be greater or less than the sample rate of the input signal. The interpolation applies interpolation coefficients, which are non-linear with respect to an associated positioning vector, to a set of input samples to provide desired scaling and/or conversion of the input sample into the desired output sample.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: October 18, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Walter Heinrich Demmer
  • Publication number: 20020106026
    Abstract: A low-order polyphase interpolation filter, such as for decoding video and image signals, employs interpolation to facilitate sample rate conversion from a first rate to a second rate, which can be greater or less than the sample rate of the input signal. The interpolation applies interpolation coefficients, which are non-linear with respect to an associated positioning vector, to a set of input samples to provide desired scaling and/or conversion of the input sample into the desired output sample.
    Type: Application
    Filed: December 4, 2001
    Publication date: August 8, 2002
    Inventor: Walter Heinrich Demmer