Patents by Inventor Walter Heinrich Riess

Walter Heinrich Riess has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10338630
    Abstract: System and method related to photonic computing are provided. A photonic computing system may include an optical interference region and an input waveguide configured to couple an optical input signal to the optical interference region and to create an optical interference pattern in the optical interference region. The interference pattern has an optical power distribution. The photonic computing system may further include a readout unit that is arranged in an inner area of the optical interference region. The readout unit is configured to detect an optical readout signal of the optical power distribution at a readout position of the inner area of the optical interference region. A method is also provided for performing photonic computing.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: July 2, 2019
    Assignee: International Business Machines Corporation
    Inventors: Stefan Abel, Jean Fompeyrine, Bert Jan Offrein, Walter Heinrich Riess
  • Publication number: 20180284834
    Abstract: System and method related to photonic computing are provided. A photonic computing system may include an optical interference region and an input waveguide configured to couple an optical input signal to the optical interference region and to create an optical interference pattern in the optical interference region. The interference pattern has an optical power distribution. The photonic computing system may further include a readout unit that is arranged in an inner area of the optical interference region. The readout unit is configured to detect an optical readout signal of the optical power distribution at a readout position of the inner area of the optical interference region. A method is also provided for performing photonic computing.
    Type: Application
    Filed: April 3, 2017
    Publication date: October 4, 2018
    Inventors: Stefan Abel, Jean Fompeyrine, Bert Jan Offrein, Walter Heinrich Riess
  • Patent number: 8969931
    Abstract: A semiconductor device and a method for fabricating the semiconductor device. The device includes: a doped semiconductor having a source region, a drain region, a channel between the source and drain regions, and an extension region between the channel and each of the source and drain regions; a gate formed on the channel; and a screening coating on each of the extension regions. The screening coating includes: (i) an insulating layer that has a dielectric constant that is no greater than about half that of the extension regions and is formed directly on the extension regions, and (ii) a screening layer on the insulating layer, where the screening layer screens the dopant ionization potential in the extension regions to inhibit dopant deactivation.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: March 3, 2015
    Assignee: International Business Machines Corporation
    Inventors: Mikael T. Bjoerk, Joachim Knoch, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Patent number: 8754401
    Abstract: An Impact Ionization Field-Effect Transistor (I-MOS) device in which device degradation caused by hot carrier injection into a gate oxide is prevented. The device includes source, drain, and gate contacts, and a channel between the source and the drain. The channel has a dimension normal to the direction of a charge carrier transport in the channel such that the energy separation of the first two sub-bands equals or exceeds the effective energy band gap of the channel material.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: June 17, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mikael T Bjoerk, Oliver Hayden, Joachim Knoch, Emanuel Loertscher, Heike E Riel, Walter Heinrich Riess, Heinz Schmid
  • Publication number: 20120280292
    Abstract: A semiconductor device and a method for fabricating the semiconductor device. The device includes: a doped semiconductor having a source region, a drain region, a channel between the source and drain regions, and an extension region between the channel and each of the source and drain regions; a gate formed on the channel; and a screening coating on each of the extension regions. The screening coating includes: (i) an insulating layer that has a dielectric constant that is no greater than about half that of the extension regions and is formed directly on the extension regions, and (ii) a screening layer on the insulating layer, where the screening layer screens the dopant ionization potential in the extension regions to inhibit dopant deactivation.
    Type: Application
    Filed: October 18, 2010
    Publication date: November 8, 2012
    Applicant: International Business Machines Corporation
    Inventors: Mikael T. Bjoerk, Joachim Knoch, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Patent number: 8193524
    Abstract: An electronic device and method of manufacturing the device. The device includes a semiconducting region, which can be a nanowire, a first contact electrically coupled to the semiconducting region, and at least one second contact capacitively coupled to the semiconducting region. At least a portion of the semiconducting region between the first contact and the second contact is covered with a dipole layer. The dipole layer can act as a local gate on the semiconducting region to enhance the electric properties of the device.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: June 5, 2012
    Assignee: International Business Machines Corporation
    Inventors: Mikael T Bjoerk, Joachim Knoch, Heike E Riel, Walter Heinrich Riess, Heinz Schmid
  • Patent number: 8053037
    Abstract: A device for patterning structures on a substrate includes an imaging device having a scanning tip, a light emitting device, and a space around the scanning tip. The space comprises a vapor of a material which is suitable for Chemical Vapor Deposition onto the substrate when decomposed. The light emitting device is adapted to emit a light beam, which has an intensity not capable to decompose the vapor, onto the scanning tip in such a way that an electromagnetic field induced by the light beam near the scanning tip is high enough to decompose the vapor.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: November 8, 2011
    Assignee: International Business Machines Corporation
    Inventors: Siegfried F. Karg, Roland Germann, Heike E. Riel, Walter Heinrich Riess, Reto Schlittler
  • Patent number: 7947580
    Abstract: A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: May 24, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mikael T. Bjoerk, Oliver Hayden, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Publication number: 20110049476
    Abstract: An Impact Ionization Field-Effect Transistor (I-MOS) device in which device degradation caused by hot carrier injection into a gate oxide is prevented. The device includes source, drain, and gate contacts, and a channel between the source and the drain. The channel has a dimension normal to the direction of a charge carrier transport in the channel such that the energy separation of the first two sub-bands equals or exceeds the effective energy band gap of the channel material.
    Type: Application
    Filed: August 30, 2010
    Publication date: March 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mikael T. Bjoerk, Oliver Hayden, Joachim Knoch, Emanuel Loertscher, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Publication number: 20100072460
    Abstract: An electronic device and method of manufacturing the device. The device includes a semiconducting region, which can be a nanowire, a first contact electrically coupled to the semiconducting region, and at least one second contact capacitively coupled to the semiconducting region. At least a portion of the semiconducting region between the first contact and the second contact is covered with a dipole layer. The dipole layer can act as a local gate on the semiconducting region to enhance the electric properties of the device.
    Type: Application
    Filed: September 22, 2009
    Publication date: March 25, 2010
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Mikael T. Bjoerk, Joachim Knoch, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Publication number: 20090258166
    Abstract: A device for patterning structures on a substrate includes an imaging device having a scanning tip, a light emitting device, and a space around the scanning tip. The space comprises a vapour of a material which is suitable for Chemical Vapour Deposition onto the substrate when decomposed. The light emitting device is adapted to emit a light beam, which has an intensity not capable to decompose the vapour, onto the scanning tip in such a way that an electromagnetic field induced by the light beam near the scanning tip is high enough to decompose the vapour.
    Type: Application
    Filed: November 9, 2004
    Publication date: October 15, 2009
    Applicant: International Business Machines Corporation
    Inventors: Siegfried F. Karg, Roland Germann, Heike E. Riel, Walter Heinrich Riess, Reto Schlittler
  • Publication number: 20090146133
    Abstract: A method for the fabrication of a semiconductor structure that includes areas that have different crystalline orientation and semiconductor structure formed thereby. The disclosed method allows fabrication of a semiconductor structure that has areas of different semiconducting materials. The method employs templated crystal growth using a Vapor-Liquid-Solid (VLS) growth process. A silicon semiconductor substrate having a first crystal orientation direction is etched to have an array of holes into its surface. A separation layer is formed on the inner surface of the hole for appropriate applications. A growth catalyst is placed at the bottom of the hole and a VLS crystal growth process is initiated to form a nanowire. The resultant nanowire crystal has a second different crystal orientation which is templated by the geometry of the hole.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 11, 2009
    Inventors: Mikael T. Bjoerk, Oliver Hayden, Heike E. Riel, Walter Heinrich Riess, Heinz Schmid
  • Publication number: 20080011996
    Abstract: The present invention provides a microelectronic device comprising a resistance structure including a plurality of programmable resistance layers and at least one intermediate layer such that an intermediate layer is placed between two programmable resistance layers. The programmable resistance layers can be individually doped or may consist of different materials. Each programmable resistance layer may be optimized for a specific application. The microelectronic device can be used as a programmable resistor or a memory cell as it exhibits switchable electrical resistance and does not require a time-consuming conditioning process.
    Type: Application
    Filed: July 11, 2006
    Publication date: January 17, 2008
    Inventors: Johannes Georg Bednorz, Walter Heinrich Riess, Siegfried F. Karg, Gerhard Ingmar Meijer, German Hammerl
  • Patent number: 6723591
    Abstract: There is provided a method for fabricating an organic light emitting device. The method includes depositing a first electrode layer on a substrate, depositing an electrically insulating layer on the first electrode layer, depositing a second electrode layer on the insulating layer, depositing an organic layer on the second electrode layer, forming an aperture in the organic layer, depositing a light transmissive electrically conductive layer on the organic layer, and forming an electrical connection between the conductive layer and one of the first and second electrode layers via the aperture.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: April 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Armin Beck, Tilman A. Beierlein, Peter Mueller, Heike Riel, Walter Heinrich Riess
  • Publication number: 20030146453
    Abstract: An organic light emitting device has a layer structure comprising: a first electrode layer (20); a second electrode layer (40) parallel to the first electrode layer (20); and, an electrically conductive and light transmissive layer (70) parallel to the second electrode layer. An electrically insulating layer (30) is disposed between the first and second electrode layers. A layer of organic material (50) is disposed between the second electrode layer and the conductive layer. An aperture (60) in the organic layer provides an electrical connection path between the conductive layer and one of the first and second electrode layers.
    Type: Application
    Filed: March 3, 2003
    Publication date: August 7, 2003
    Applicant: International Business Machines Corporation
    Inventors: Armin Beck, Tilman A. Beierlein, Peter Mueller, Heike Riel, Walter Heinrich Riess
  • Patent number: 6580090
    Abstract: A method of making a light-emitting device comprises forming a first and second components. The first component has a first substrate, a first electrode on the first substrate, an organic layer on the first electrode, and a light-transmissive second electrode on the organic layer. The second component has a light-transmissive second substrate, and a light transmissive, electrically conductive layer on the second substrate. The first and second components are joined with the second electrode of the first component facing the conductive layer of the second component. An electrical contact is formed between the second electrode of the first component and the electrically conductive layer of the second component.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: June 17, 2003
    Assignee: International Business Machines Corporation
    Inventors: Siegfried Johannes Barth, Tilman A. Beierlein, Siegfried F. Karg, Heike Riel, Walter Heinrich Riess
  • Patent number: 6552364
    Abstract: An organic light emitting device has a layer structure having: a first electrode layer; a second electrode layer parallel to the first electrode layer; and, an electrically conductive and light transmissive layer parallel to the second electrode layer. An electrically insulating layer is disposed between the first and second electrode layers. A layer of organic material is disposed between the second electrode layer and the conductive layer. An aperture in the organic layer provides an electrical connection path between the conductive layer and one of the first and second electrode layers.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: April 22, 2003
    Assignee: International Business Machines Corporation
    Inventors: Armin Beck, Tilman A. Beierlein, Peter Mueller, Heike Riel, Walter Heinrich Riess
  • Patent number: 6548961
    Abstract: A method of making a light-emitting device comprises forming a first and second components. The first component has a light-transmissive first substrate, light transmissive first electrode layer on the first substrate, an organic layer on the first electrode, and a second electrode layer on the organic layer. The second component has a second substrate and driver array circuitry on the second substrate. The first component and the second component are joined together with the second electrode of the first component facing the driver array of the second component. An electrical contact is formed between one of the first and second electrode layers of the first component and the driver array circuitry of the second component.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: April 15, 2003
    Assignee: International Business Machines Corporation
    Inventors: Siegfried Johannes Barth, Tilman A. Beierlein, Siegfried F. Karg, Heike Riel, Walter Heinrich Riess
  • Publication number: 20020197754
    Abstract: An organic light emitting device has a layer structure comprising: a first electrode layer (20); a second electrode layer (40) parallel to the first electrode layer (20); and, an electrically conductive and light transmissive layer (70) parallel to the second electrode layer. An electrically insulating layer (30) is disposed between the first and second electrode layers. A layer of organic material (50) is disposed between the second electrode layer and the conductive layer. An aperture (60) in the organic layer provides an electrical connection path between the conductive layer and one of the first and second electrode layers.
    Type: Application
    Filed: June 22, 2001
    Publication date: December 26, 2002
    Applicant: International Business Machines Corporation
    Inventors: Armin Beck, Tilman A. Beierlein, Peter Mueller, Heike Riel, Walter Heinrich Riess
  • Publication number: 20020195961
    Abstract: A method of making a light-emitting device comprises forming a first and second components. The first component has a light-transmissive first substrate, light transmissive first electrode layer on the first substrate, an organic layer on the first electrode, and a second electrode layer on the organic layer. The second component has a second substrate and driver array circuitry on the second substrate. The first component and the second component are joined together with the second electrode of the first component facing the driver array of the second component. An electrical contact is formed between one of the first and second electrode layers of the first component and the driver array circuitry of the second component.
    Type: Application
    Filed: June 22, 2001
    Publication date: December 26, 2002
    Applicant: International Business Machines Corporation
    Inventors: Siegfried Barth, Tilman A. Beierlein, Siegfried F. Karg, Heike Riel, Walter Heinrich Riess