Abstract: A method and circuit for prefetching is provided wherein selective caching of instructions occurs. An instruction execution tree comprising a plurality of instructions is traversed in a predetermined manner. Instructions depending from both paths of a conditional branch instruction are prefetched. When it is determined that a branch of prefetched instructions is not in the path of execution the instructions associated with that branch are deleted thereby pruning the branch. Instruction addresses are therefore selectively removed from a storage memory in such a manner as to provide the cache with instructions which will likely be required by the processor.

Abstract: A cache memory functioning as a circular buffer for use as a part historical, part predictive cache memory is provided. A first register contains data having a value corresponding to a cache memory location of a last instruction executed by a processor and a second register contains data having a value corresponding to a memory location in the cache memory of a last prefetched instruction. Prefetching of instructions from a main memory to the cache memory is disabled if the difference between the values in the first and second pointer registers exceeds a predetermined amount.