Patents by Inventor Walter J. Rowe, Jr.

Walter J. Rowe, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Backside failure analysis of integrated circuits
    Patent number: 7063987
    Abstract: Backside failure analysis of integrated circuits. In one embodiment, a method of preparing a device under test (DUT) for an image based diagnostic testing is disclosed. The method comprises removing a portion of the backside package of the DUT to allow for the implementation of an image based diagnostic test through the backside of the DUT. The functionality of DUT is destroyed by the removal of the portion of the backside package of the DUT. Further, restoring the functionality of the DUT with an interface carrier before an image based diagnostic test is conducted.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: June 20, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Walter J. Rowe, Jr., Isaiah McDonald, Malcolm P. Cambra, Jr.