Abstract: A storage device includes a nonvolatile memory device and a storage controller. The storage controller accesses the nonvolatile memory device based on a request of an external host device. The storage controller sends a signal to the external host device, based a throughput of accessing the nonvolatile memory device being within a specific range.

Abstract: A method for operating an integrated circuit, including: completing a first link equalization operation with an external integrated circuit; receiving a first signal transmitted by an external transmitter included in the external integrated circuit during an operation at an internal receiver included in the integrated circuit; measuring an eye margin of the first signal at the internal receiver; comparing the measured eye phase with a threshold eye margin to obtain and store a comparison result; transmitting the comparison result as a second signal to an external receiver included in the external integrated circuit using an internal transmitter included in the internal integrated circuit; and performing a second link equalization operation between the external transmitter and the external receiver based on the second signal.

Abstract: A storage controller receives a first transmission preset value and a first coefficient value at a first time from outside, at a phase 3 stage of a PCIe link training and equalization, checks whether the first transmission preset value and the first coefficient value are optimal with reference to a database, transmits signals corresponding to the first transmission preset value and the first coefficient value to the outside when the first transmission preset value and the first coefficient value are determined to be optimal and transmits signals corresponding to a second transmission preset value and a second coefficient value from the database, which are different from the first transmission preset value and the first coefficient value and optimal for the phase 3 stage of the PCIe link training and equalization, to the outside when the first transmission preset value and the first coefficient value are determined not to be optimal.

Abstract: A storage device includes a nonvolatile memory device and a controller that accesses the nonvolatile memory device based on a request of an external host device, receives a first clock signal from the external host device, generates a second clock signal through frequency multiplication of the first clock signal, and communicates with the external host device based on the second clock signal. The controller requests the external host device to adjust a multiplication ratio for the frequency multiplication of the first clock signal.

Abstract: A memory device, and an operating method of the memory device and a host device are provided. The method of operating a memory device includes receiving a command for requesting an Eye Open Monitor (EOM) operation performance from a host device, receiving pattern data including data and non-data from the host device, performing the EOM operation which performs an error count to correspond to the data, and does not perform the error count on the non-data, and transmitting an EOM response signal including the error count result to the host device.

Abstract: A system includes a transmission device and a reception device that are connected through a link. The reception device includes a reception buffer configured to receive and store transaction layer packets and a reception flow controller configured to generate flow control packets by monitoring an occupation state of the reception buffer. The transmission device includes a transmission buffer, a transmission flow controller and a dynamic frequency controller. The transmission buffer stores pending transaction layer packets to be transferred to the reception device. The transmission flow controller controls a flow of transaction layer packets to be transferred to the reception device based on the flow control packets received from the reception device. The dynamic frequency controller controls a frequency of an internal clock signal of the transmission device by monitoring a state of the transmission buffer and a state of the transmission flow controller.

Abstract: A storage system communicates with a host system and includes a storage device including storage medium divided into a plurality of blocks including high reliability blocks and reserve blocks, and a controller. The controller provides the host system with block information identifying the high reliability blocks among the plurality of blocks, receives a block allocation request from the host system, wherein the block allocation request is defined with reference to the block information and identifies at least one high reliability block to be used to store metadata, and allocates at least one high reliability block to a meta region in response to the block allocation request. The controller includes a bad block manager that manages an allocation operation performed in response to the block allocation request, and a repair module that repairs an error in metadata stored in one of the high reliability blocks.

Abstract: Provided are an operating method of a host device, an operating method of a memory device, and a memory system. The operating method of a host device includes transmitting a request command for performing an eye-opening monitor (EOM) operation to a memory device, transmitting a parameter for performing the EOM operation to the memory device, transmitting pattern data for performing the EOM operation to the memory device, and receiving a first response signal including a result of the EOM operation performed based on the parameter and the pattern data from the memory device.

Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address.

Abstract: A redundant array of independent disks (RAID) storage device including; a memory device including first memory devices configured to store at least one of data chunks and corresponding parity (data chunks/parity) and a second memory device configured to serve as a spare memory region, and a RAID controller including a RAID internal memory configured to store a count table and configured to control performing of a rebuild operation in response to a command received from a host, wherein upon identification of a failed first memory device, the RAID controller accesses used regions of non-failed first memory devices based on the count table and rebuilds data of the failed first memory device using the second memory device.

Abstract: A system includes a transmission device and a reception device that are connected through a link. The reception device includes a reception buffer configured to receive and store transaction layer packets and a reception flow controller configured to generate flow control packets by monitoring an occupation state of the reception buffer. The transmission device includes a transmission buffer, a transmission flow controller and a dynamic frequency controller. The transmission buffer stores pending transaction layer packets to be transferred to the reception device. The transmission flow controller controls a flow of transaction layer packets to be transferred to the reception device based on the flow control packets received from the reception device. The dynamic frequency controller controls a frequency of an internal clock signal of the transmission device by monitoring a state of the transmission buffer and a state of the transmission flow controller.

Abstract: A storage device includes a nonvolatile memory device and a storage controller. The storage controller accesses the nonvolatile memory device based on a request of an external host device. The storage controller sends a signal to the external host device, based a throughput of accessing the nonvolatile memory device being within a specific range.

Abstract: A memory device, and an operating method of the memory device and a host device are provided. The method of operating a memory device includes receiving a command for requesting an Eye Open Monitor (EOM) operation performance from a host device, receiving pattern data including data and non-data from the host device, performing the EOM operation which performs an error count to correspond to the data, and does not perform the error count on the non-data, and transmitting an EOM response signal including the error count result to the host device.

Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address

Abstract: Provided are an operating method of a host device, an operating method of a memory device, and a memory system. The operating method of a host device includes transmitting a request command for performing an eye-opening monitor (EOM) operation to a memory device, transmitting a parameter for performing the EOM operation to the memory device, transmitting pattern data for performing the EOM operation to the memory device, and receiving a first response signal including a result of the EOM operation performed based on the parameter and the pattern data from the memory device.

Abstract: A storage device includes a nonvolatile memory device and a controller that accesses the nonvolatile memory device based on a request of an external host device, receives a first clock signal from the external host device, generates a second clock signal through frequency multiplication of the first clock signal, and communicates with the external host device based on the second clock signal. The controller requests the external host device to adjust a multiplication ratio for the frequency multiplication of the first clock signal.

Abstract: A storage device includes an integrity checking module checking integrity of data stored in a first host memory buffer (HMB) address of an HMB in a host coupled to the storage device, and an HMB mapping module mapping, if the integrity checking module determines the data as corrupted, the first HMB address to a second address.

Abstract: A redundant array of independent disks (RAID) storage device including; a memory device including first memory devices configured to store at least one of data chunks and corresponding parity (data chunks/parity) and a second memory device configured to serve as a spare memory region, and a RAID controller including a RAID internal memory configured to store a count table and configured to control performing of a rebuild operation in response to a command received from a host, wherein upon identification of a failed first memory device, the RAID controller accesses used regions of non-failed first memory devices based on the count table and rebuilds data of the failed first memory device using the second memory device.

Abstract: In a method of operating a storage device including a non-volatile memory (NVM), the non-volatile memory including a memory cell array, the memory cell array including a first plane and a second plane, the method includes receiving a read command set for data sensing of the first and second plane; simultaneously loading first page data stored in the first plane into a first page buffer of the first plane and second page data stored in the second plane into a second page buffer of the second plane based on the read command set; receiving a data output command set that includes the first plane; and continuously transmitting the first page data and the second page databased on the data output command set.

Abstract: A data storage device includes a nonvolatile memory device, a storage controller and a mapping controller. The nonvolatile memory device stores an execution code that controls operations of the data storage device. The storage controller uploads and stores the execution code from the nonvolatile memory device to a host memory buffer included in an external host device, and downloads the execution code in realtime from the host memory buffer to execute the execution code that is downloaded from the host memory buffer. The mapping controller manages a mapping table including mapping relations between the execution code and host addresses of the host memory buffer at which the execution code is stored. A speed of accessing the execution code is increased and performance of the data storage device is enhanced by using the host memory buffer as storage of the execution code to control the operation of the data storage device.