Patents by Inventor Walter Moden
Walter Moden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6777261Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.Type: GrantFiled: November 26, 2002Date of Patent: August 17, 2004Assignee: Micron Technology, Inc.Inventors: Warren Farnworth, Larry Kinsman, Walter Moden
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Publication number: 20040139604Abstract: A technique is provided for installing circuit components, such as memory devices, in a support, such as a socket. The device to be installed is supported in a holder or shell. The holder is positioned over a support region in the receiving socket. A manual actuator is pressed into the holder to eject the device from the holder and to install the device in the support. The holder may be configured to hold a single device, or multiple devices aligned in slots defined by partitions. A multi-device tray may be provided for indexing devices toward an ejection slot, through which the devices are installed by manual actuation of an ejecting actuator. The technique provides protection for the device prior to and during installation, and facilitates manual installation of such devices without requiring direct hand contact with the device either prior to or during installation.Type: ApplicationFiled: December 29, 2003Publication date: July 22, 2004Inventors: Larry Kinsman, Mike Brooks, Warren M. Farnworth, Walter Moden, Terry R. Lee
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Publication number: 20040027815Abstract: The invention provides an electrical contact device, a pre-assembly for producing the electrical contact device, and a method of forming the electrical contact device. The electrical contact device includes a plurality of fine pitch electrical leads disposed in parallel spaced apart relation. An insulating member encapsulates portions of the electrical leads which extend from opposite sides of the insulating member. The insulating member retains the electrical leads in position and electrically isolated from one another. The contact device is used to facilitate connection with the leads of an IC package.Type: ApplicationFiled: July 10, 2003Publication date: February 12, 2004Inventor: Walter Moden
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Patent number: 6681480Abstract: A technique is provided for installing circuit components, such as memory devices, in a support, such as a socket. The device to be installed is supported in a holder or shell. The holder is positioned over a support region in the receiving socket. A manual actuator is pressed into the holder to eject the device from the holder and to install the device in the support. The holder may be configured to hold a single device, or multiple devices aligned in slots defined by partitions. A multi-device tray may be provided for indexing devices toward an ejection slot, through which the devices are installed by manual actuation of an ejecting actuator. The technique provides protection for the device prior to and during installation, and facilitates manual installation of such devices without requiring direct hand contact with the device either prior to or during installation.Type: GrantFiled: February 26, 1999Date of Patent: January 27, 2004Assignee: Micron Technology, Inc.Inventors: Larry Kinsman, Mike Brooks, Warren M. Farnworth, Walter Moden, Terry Lee
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Patent number: 6625885Abstract: The invention provides a method of forming an electrical contact device and a pre-assembly for producing the electrical contact device. The electrical contact device is formed by providing a conducting frame and an insulating frame which is added to predetermined portions of the conducting frame to form the pre-assembly. A plurality of fine pitch electrical leads are disposed in parallel spaced apart relation and connected to each other by connecting strips. An insulating material is applied to the conducting frame to form the insulating frame. The insulating frame encapsulates portions of the electrical leads which extend from opposite sides of the center of the insulating frame retaining, therefore, the electrical leads in position and electrically isolated from one another. Portions of the conducting frame are then removed from the pre-assembly to obtain the electrical device.Type: GrantFiled: February 23, 2000Date of Patent: September 30, 2003Assignee: Micron Technology, Inc.Inventor: Walter Moden
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Patent number: 6589810Abstract: A BGA package and a method for fabricating the package are provided. The package includes a semiconductor die, internal conductors wire bonded to bond pads on the die, external ball contacts attached to ball bonding pads formed on the conductors in a dense grid pattern, and an encapsulating resin encapsulating the die and conductors. The package is fabricated using a lead frame having lead fingers that form the conductors. The die is back bonded to a polymer tape placed across the lead fingers, and then wire bonded to bonding pads on the conductors. In addition, the encapsulating resin is molded to include openings for the ball contacts which are aligned with the ball bonding pads. An alternate embodiment BGA package includes a polymer substrate adhesively bonded to a face of the die. The polymer substrate includes conductors having beam leads aligned with an opening through the polymer substrate. The opening provides access for a bonding tool for bonding bumps on the beam leads to bond pads on the die.Type: GrantFiled: April 10, 2000Date of Patent: July 8, 2003Assignee: Micron Technology, Inc.Inventor: Walter Moden
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Publication number: 20030089981Abstract: A semiconductor package, and a method for fabricating the package are provided. The package includes a plastic body, and a pair of stacked semiconductor dice encapsulated in the plastic body, and wire bonded to separate leadframe segments. A first leadframe segment includes lead fingers configured to support a first semiconductor die of the stacked pair, and to form terminal leads of the package. A second leadframe segment is attached to the first leadframe segment, and includes lead fingers that support a second semiconductor die of the stacked pair. The lead fingers of the second leadframe are in physical and electrical contact with the leadfingers of the first leadframe. In addition, tip portions of the lead fingers of the first leadframe segment are staggered relative to tip portions of the lead fingers of the second leadframe segment to provide space for bond wires.Type: ApplicationFiled: December 31, 2002Publication date: May 15, 2003Inventor: Walter Moden
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Publication number: 20030082856Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.Type: ApplicationFiled: November 26, 2002Publication date: May 1, 2003Applicant: Micron Technology, Inc.Inventors: Warren Farnworth, Larry Kinsman, Walter Moden
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Patent number: 6552427Abstract: A BGA package and a method for fabricating the package are provided. The package includes a semiconductor die, internal conductors wire bonded to bond pads on the die, external ball contacts attached to ball bonding pads formed on the conductors in a dense grid pattern, and an encapsulating resin encapsulating the die and conductors. The package is fabricated using a lead frame having lead fingers that form the conductors. The die is back bonded to a polymer tape placed across the lead fingers, and then wire bonded to bonding pads on the conductors. In addition, the encapsulating resin is molded to include openings for the ball contacts which are aligned with the ball bonding pads. An alternate embodiment BGA package includes a polymer substrate adhesively bonded to a face of the die. The polymer substrate includes conductors having beam leads aligned with an opening through the polymer substrate. The opening provides access for a bonding tool for bonding bumps on the beam leads to bond pads on the die.Type: GrantFiled: August 15, 2002Date of Patent: April 22, 2003Assignee: Micron Technology, Inc.Inventor: Walter Moden
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Patent number: 6511863Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.Type: GrantFiled: December 26, 2000Date of Patent: January 28, 2003Assignee: Micron Technology, Inc.Inventors: Warren Farnworth, Larry Kinsman, Walter Moden
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Patent number: 6506625Abstract: A semiconductor package, and a method for fabricating the package are provided. The package includes a plastic body, and a pair of stacked semiconductor dice encapsulated in the plastic body, and wire bonded to separate leadframe segments. A first leadframe segment includes lead fingers configured to support a first semiconductor die of the stacked pair, and to form terminal leads of the package. A second leadframe segment is attached to the first leadframe segment, and includes lead fingers that support a second semiconductor die of the stacked pair. The lead fingers of the second leadframe are in physical and electrical contact with the leadfingers of the first leadframe. In addition, tip portions of the lead fingers of the first leadframe segment are staggered relative to tip portions of the lead fingers of the second leadframe segment to provide space for bond wires.Type: GrantFiled: April 30, 2001Date of Patent: January 14, 2003Assignee: Micron Technology, Inc.Inventor: Walter Moden
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Publication number: 20020192862Abstract: A BGA package and a method for fabricating the package are provided. The package includes a semiconductor die, internal conductors wire bonded to bond pads on the die, external ball contacts attached to ball bonding pads formed on the conductors in a dense grid pattern, and an encapsulating resin encapsulating the die and conductors. The package is fabricated using a lead frame having lead fingers that form the conductors. The die is back bonded to a polymer tape placed across the lead fingers, and then wire bonded to bonding pads on the conductors. In addition, the encapsulating resin is molded to include openings for the ball contacts which are aligned with the ball bonding pads. An alternate embodiment BGA package includes a polymer substrate adhesively bonded to a face of the die. The polymer substrate includes conductors having beam leads aligned with an opening through the polymer substrate. The opening provides access for a bonding tool for bonding bumps on the beam leads to bond pads on the die.Type: ApplicationFiled: August 15, 2002Publication date: December 19, 2002Inventor: Walter Moden
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Patent number: 6479326Abstract: The present invention relates to method of forming a chip package that includes a heat management structure that allows for heat rejection away from a chip but that avoids the prior art problems of thermal stresses caused by dissimilar thermal conductivities of a heat management structure and of creating a thermally unbalanced package due to disparate distribution of packaging plastic. In an embodiment of the present invention a package includes a chip, leads on the chip, a die attach, a downset, a packaging plastic, and an outer structure among others. The outer structure, downset, and die attach are together a substantially unitary article. Achieving a balanced package that substantially resists warpage and bowing during ordinary manufacture and ordinary use in the life of the package is accomplished by balancing packaging material width and the ability of the downset to resist warpage and bowing stresses.Type: GrantFiled: February 16, 2000Date of Patent: November 12, 2002Assignee: Micron Technology, Inc.Inventors: David Corisis, Walter Moden
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Publication number: 20020030284Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.Type: ApplicationFiled: September 10, 2001Publication date: March 14, 2002Applicant: Micron Technology, Inc.Inventors: Warren Farnworth, Larry Kinsman, Walter Moden
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Patent number: 6329222Abstract: An interconnect for BGA packages, a BGA package fabricated using the interconnect, and a method for fabricating BGA packages using the interconnect, are provided. The interconnect includes multiple polymer substrates on which patterns of conductors are formed. Each substrate can be used to fabricate a BGA package. The conductors on the substrates include end portions having bonding vias formed therethrough in alignment with access openings in the substrates. During fabrication of the BGA packages, the bonding vias allow the conductors to be bonded to bond pads on semiconductor dice by forming metal bumps on the bonding vias and bond pads. The access openings in the substrates provide access to the bonding vias and bond pads for a bonding tool configured to form the metal bumps. In addition to the bonding vias, the conductors include ball bonding pads configured for attaching ball contacts, such as solder balls, to the conductors and substrates.Type: GrantFiled: December 20, 1999Date of Patent: December 11, 2001Assignee: Micron Technology, Inc.Inventors: David Corisis, Walter Moden
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Patent number: 6316717Abstract: The present invention relates to a heat management structure within a chip package that allows for heat rejection away from a chip while addressing problems of thermal stresses caused by dissimilar thermal conductivities of a heat management structure and of creating a thermally unbalanced package due to disparate distribution of packaging plastic. In an embodiment of the present invention a package includes a chip, leads on the chip, a die attach, a downset, a packaging plastic, and an outer structure among others. The outer structure, downset, and die attach are together a substantially unitary article. Achieving a balanced package that substantially resists warpage and bowing during ordinary manufacture and ordinary use in the life of the package is accomplished by balancing packaging material width and the ability of the downset to resist warpage and bowing stresses.Type: GrantFiled: February 16, 2000Date of Patent: November 13, 2001Assignee: Micron Technology, Inc.Inventors: David Corisis, Walter Moden
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Patent number: 6310390Abstract: A BGA package and a method for fabricating the package are provided. The package includes a semiconductor die, internal conductors wire bonded to bond pads on the die, external ball contacts attached to ball bonding pads formed on the conductors in a dense grid pattern, and an encapsulating resin encapsulating the die and conductors. The package is fabricated using a lead frame having lead fingers that form the conductors. The die is back bonded to a polymer tape placed across the lead fingers, and then wire bonded to bonding pads on the conductors. In addition, the encapsulating resin is molded to include openings for the ball contacts which are aligned with the ball bonding pads. An alternate embodiment BGA package includes a polymer substrate adhesively bonded to a face of the die. The polymer substrate includes conductors having beam leads aligned with an opening through the polymer substrate. The opening provides access for a bonding tool for bonding bumps on the beam leads to bond pads on the die.Type: GrantFiled: April 8, 1999Date of Patent: October 30, 2001Assignee: Micron Technology, Inc.Inventor: Walter Moden
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Patent number: 6303981Abstract: A semiconductor package, and a method for fabricating the package are provided. The package includes a plastic body, and a pair of stacked semiconductor dice encapsulated in the plastic body, and wire bonded to separate leadframe segments. A first leadframe segment includes lead fingers configured to support a first semiconductor die of the stacked pair, and to form terminal leads of the package. A second leadframe segment is attached to the first leadframe segment, and includes lead fingers that support a second semiconductor die of the stacked pair. The lead fingers of the second leadframe are in physical and electrical contact with the leadfingers of the first leadframe. In addition, tip portions of the lead fingers of the first leadframe segment are staggered relative to tip portions of the lead fingers of the second leadframe segment to provide space for bond wires.Type: GrantFiled: September 1, 1999Date of Patent: October 16, 2001Assignee: Micron Technology, Inc.Inventor: Walter Moden
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Patent number: 6291894Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.Type: GrantFiled: August 31, 1998Date of Patent: September 18, 2001Assignee: Micron Technology, Inc.Inventors: Warren Farnworth, Larry Kinsman, Walter Moden
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Publication number: 20010017407Abstract: A method for packaging a semiconductor device includes connecting a plurality of wire leads to a corresponding plurality of electrical connection pads on the semiconductor device, covering at least a portion of the semiconductor device and at least a portion of each of the wire leads with an encapsulating material, and removing a portion of the encapsulating material and a portion of each of the wire leads to form a packaged semiconductor device wherein each of the wire leads has an exposed portion only at an end. The invention also includes a packaged semiconductor device having an integrated circuit device with a plurality of electrical connection pads, a plurality of wire leads coupled to the plurality of electrical connection pads, and a covering of encapsulating material covering at least a portion of the integrated circuit device and covering each of the wire leads, wherein each of the wire leads has an exposed end.Type: ApplicationFiled: December 26, 2000Publication date: August 30, 2001Inventors: Warren Farnworth, Larry Kinsman, Walter Moden