Abstract: An associative memory system in large-scale-integrated semiconductor technology comprises word-organized and bitwise maskable fully associative memory devices which can be arranged in a memory array with a plurality of rows and columns and a control unit for determining and evaluating match information and for handling data transfer via the system interface. A minimum number of package pins for the memory devices is achievable in that in a manner known per se the word address as well as the operation instruction are fetched in coded form and are decoded internally, the input data, output data and mask information share the use of the same package pins, the match information available internally by virtue of a search operation not being indicated parallel, but in the form of a sequence of match codewords externally emitted, each codeword unambiguously identifying a specific match position and the order of emission being controlled by a priority scheme.