Abstract: A container having a base and a lid is provided. The lid may be rotatable about a hinge from a closed configuration to an open configuration and may be secured, via one or more latching assemblies. The latching assembly may comprise a latch body, a locking member, a biasing member, and an activating member. Additional features of the container may include handles and strength increasing features. The base and lid may also feature attachment points for various accessories. A carry strap may attach to the base of the container to allow a user to lift and carry the container. The container may also have a wheels attached to the bottom portion and/or across the bottom portion to one side of the sidewall structure. In addition, in exemplary containers with wheels, a pull handle may be attached to a side opposite the wheels. The lid may include a lid support member that can act as a molle board to releasably secure items to the lid support member while also providing structural support to the lid.

Abstract: A system comprising: a first host and a second host; and an integrated circuit comprising: a first bus and a second bus physically separate and isolated from the first bus; a first host interface to connect the first host to the first bus and a second host interface to connect the second host to the second bus; and a hot plug control channel including first and second hot plug control registers, wherein each of the hot plug control registers is connectable to a hot pluggable device; wherein the hot plug control channel is to connect the first bus to the first and second hot plug control register to thereby connect the first host to the first and second hot plug control register, and is to connect the second bus to the first and second hot plug control register to thereby connect the second host to the first and second hot plug control register.

Abstract: Broadly speaking, a bandwidth matching device is provided for transforming a number of incoming data streams each having a first bandwidth into an outgoing data stream having a second bandwidth. More specifically, the bandwidth matching device provides an assembler and a disassembler. The assembler incorporates a stepped arrangement of cells for transforming the number of incoming data streams having a given bandwidth into an outgoing data stream having a larger bandwidth, wherein each portion of the outgoing data stream represents a concatenation of a number of portions of each of the incoming data streams. As a complement to the assembler, the disassembler uses a stepped arrangement of cells to transform the concatenated output generated by the assembler back into the number of incoming data streams originally received by the assembler.

Abstract: Broadly speaking, a device for addressing a shared resource is disclosed. The device includes at least one register in communication with the shared resource. The at least one register is configured to hold an address that is to be provided to the shared resource upon receipt of a clock signal. The device also includes a multiplexer for providing a next address to the at least one register. The multiplexer is disposed outside of a critical timing path for addressing the shared resource. The device for addressing the shared resource allows multiple users to be connected to the shared resource without adversely affecting both a speed of the shared resource and a number of users that can be achieved in an actual implementation of the shared resource.

Abstract: Broadly speaking, an apparatus for efficiently utilizing a shared packet buffer memory in a switch and a method for operating the same is provided. More specifically, the apparatus includes a memory having a number of buffers configured to be operated in a ratcheted manner. The ratcheted manner in which the memory is operated causes each incoming data stream to be distributed across the number of buffers. Each stored data stream can also be retrieved from the number of buffers for output from the memory in a similar ratcheted manner. The memory uses a rotating selector to control the ratcheted manner of operation. Also, the memory is capable of simultaneously servicing each of a number of inputs and a number of outputs to which the memory is connected.

Abstract: Broadly speaking, an apparatus for efficiently utilizing a shared packet buffer memory in a switch and a method for operating the same is provided. More specifically, the apparatus includes a memory having a number of buffers configured to be operated in a ratcheted manner. The ratcheted manner in which the memory is operated causes each incoming data stream to be distributed across the number of buffers. Each stored data stream can also be retrieved from the number of buffers for output from the memory in a similar ratcheted manner. The memory uses a rotating selector to control the ratcheted manner of operation. Also, the memory is capable of simultaneously servicing each of a number of inputs and a number of outputs to which the memory is connected.

Abstract: Broadly speaking, an apparatus for efficiently utilizing a shared packet buffer memory in a switch and a method for operating the same is provided. More specifically, the apparatus includes a memory having a number of buffers configured to be operated in a ratcheted manner. The ratcheted manner in which the memory is operated causes each incoming data stream to be distributed across the number of buffers. Each stored data stream can also be retrieved from the number of buffers for output from the memory in a similar ratcheted manner. The memory uses a rotating selector to control the ratcheted manner of operation. Also, the memory is capable of simultaneously servicing each of a number of inputs and a number of outputs to which the memory is connected.

Abstract: Broadly speaking, a device for addressing a shared resource is disclosed. The device includes at least one register in communication with the shared resource. The at least one register is configured to hold an address that is to be provided to the shared resource upon receipt of a clock signal. The device also includes a multiplexer for providing a next address to the at least one register. The multiplexer is disposed outside of a critical timing path for addressing the shared resource. The device for addressing the shared resource allows multiple users to be connected to the shared resource without adversely affecting both a speed of the shared resource and a number of users that can be achieved in an actual implementation of the shared resource.

Abstract: Broadly speaking, a bandwidth matching device is provided for transforming a number of incoming data streams each having a first bandwidth into an outgoing data stream having a second bandwidth. More specifically, the bandwidth matching device provides an assembler and a disassembler. The assembler incorporates a stepped arrangement of cells for transforming the number of incoming data streams having a given bandwidth into an outgoing data stream having a larger bandwidth, wherein each portion of the outgoing data stream represents a concatenation of a number of portions of each of the incoming data streams. As a complement to the assembler, the disassembler uses a stepped arrangement of cells to transform the concatenated output generated by the assembler back into the number of incoming data streams originally received by the assembler.