Patents by Inventor Walter O'Brien
Walter O'Brien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10891057Abstract: There is disclosed a technique for use in optimizing write operations for flash devices. A system having a plurality of flash based solid state drives receives a write request to overwrite existing data stored on the solid state drives with new data. The write request data is formatted using a write granularity having a first size and the solid state drives are configured with a write granularity having a second size. Corresponding existing data is retrieved. The new data and the existing data are subdivided into multiple corresponding subunits where each subunit has a size equal to the second size. Each new data subunit is compared with each corresponding existing data subunit to identify which new data subunits include modified data. The new data subunits identified as having modified data are written to corresponding locations on the solid state drives.Type: GrantFiled: December 31, 2015Date of Patent: January 12, 2021Assignee: EMC IP Holding Company LLCInventors: Walter A. O'Brien, III, Steven A. Morley
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Patent number: 10534733Abstract: Techniques for configuring a system may include selecting one of a plurality of I/O slots to be allocated a number of lanes connected to a processor; and responsive to selecting the one I/O slot, sending a selection signal to a multiplexer that selects the one I/O slot from the plurality of I/O slots and configures the number of lanes for use by the one I/O slot where the number of lanes connect the one I/O slot to the processor. The system may be a data storage system and the lanes may be PCIe lanes used for data transmission. For each I/O slot, an I/O module may be inserted, removed or replaced (e.g., removed and then replaced with a new I/O card). A management controller may select the one I/O slot and send the selection signal in accordance with one or more policies. The system may support hot plug I/O modules.Type: GrantFiled: April 26, 2018Date of Patent: January 14, 2020Assignee: EMC IP Holding Company LLCInventors: Walter A. O'Brien, III, Matthew J. Borsini
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Publication number: 20190332557Abstract: Techniques for configuring a system may include selecting one of a plurality of I/O slots to be allocated a number of lanes connected to a processor; and responsive to selecting the one I/O slot, sending a selection signal to a multiplexer that selects the one I/O slot from the plurality of I/O slots and configures the number of lanes for use by the one I/O slot where the number of lanes connect the one I/O slot to the processor. The system may be a data storage system and the lanes may be PCIe lanes used for data transmission. For each I/O slot, an I/O module may be inserted, removed or replaced (e.g., removed and then replaced with a new I/O card). A management controller may select the one I/O slot and send the selection signal in accordance with one or more policies. The system may support hot plug I/O modules.Type: ApplicationFiled: April 26, 2018Publication date: October 31, 2019Applicant: EMC IP Holding Company LLCInventors: Walter A. O'Brien, III, Matthew J. Borsini
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Patent number: 10235052Abstract: A storage system in one embodiment comprises at least one processor, a processor memory, an input-output controller, and a directly-addressable storage device having volatile memory and non-volatile memory. The input-output controller generates a plurality of write commands in conjunction with storage of data in the storage system, the write commands including at least a first write command comprising the data and a second write command comprising one or more interrupts. If an address of a given one of the write commands falls within a specified interrupt group window, the write command is copied to the directly-addressable storage device so as to provide at least one of the one or more interrupts to that storage device. The directly-addressable storage device responds to receipt of the interrupt by writing data from the volatile memory to the non-volatile memory and generating a corresponding additional interrupt to the processor.Type: GrantFiled: May 9, 2018Date of Patent: March 19, 2019Assignee: EMC IP Holding Company LLCInventors: Steven Sardella, Walter A. O'Brien, III
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Patent number: 10222984Abstract: There is disclosed a technique for use in managing multi-granularity flash translation layers in solid state drives. An SSD comprising a flash translation layer (FTL) table and flash memory space is provided. The FTL table is reconfigured into a plurality of multiple sub-tables, where a first sub-table has a first logical page size and a second sub-table has a second logical page size, the first logical page size being smaller than the second logical page size. The flash memory space is reconfigured into multiple flash memory sub-spaces. The first sub-table is mapped to the first flash memory sub-space the second sub-table is mapped to the second flash memory sub-space.Type: GrantFiled: December 31, 2015Date of Patent: March 5, 2019Assignee: EMC IP Holding Company LLCInventors: Walter A. O'Brien, III, Robert W. Beauchamp
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Publication number: 20180260116Abstract: A storage system in one embodiment comprises at least one processor, a processor memory, an input-output controller, and a directly-addressable storage device having volatile memory and non-volatile memory. The input-output controller generates a plurality of write commands in conjunction with storage of data in the storage system, the write commands including at least a first write command comprising the data and a second write command comprising one or more interrupts. If an address of a given one of the write commands falls within a specified interrupt group window, the write command is copied to the directly-addressable storage device so as to provide at least one of the one or more interrupts to that storage device. The directly-addressable storage device responds to receipt of the interrupt by writing data from the volatile memory to the non-volatile memory and generating a corresponding additional interrupt to the processor.Type: ApplicationFiled: May 9, 2018Publication date: September 13, 2018Inventors: Steven Sardella, Walter A. O'Brien, III
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Patent number: 10013364Abstract: One embodiment is directed to a technique which secures data on a set of storage drives of a data storage system. The technique involves encrypting data from a first tenant using a first tenant key to form first tenant encrypted data and storing the first tenant encrypted data on the set of storage drives. The technique further involves encrypting data from a second tenant using a second tenant key to form second tenant encrypted data and storing the second tenant encrypted data on the set of storage drives, the first tenant being different from the second tenant, and the first tenant key and the second tenant key being per tenant keys which are different from each other. The technique further involves destroying the first tenant key to prevent the first tenant encrypted data stored on the set of storage drives from being decrypted while maintaining the second tenant key to enable decryption of the second tenant encrypted data stored on the set of storage drives.Type: GrantFiled: June 26, 2015Date of Patent: July 3, 2018Assignee: EMC IP Holding Company LLCInventors: Walter O'Brien, Gregory W. Lazar, Thomas Dibb
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Patent number: 9996273Abstract: A storage system in one embodiment comprises at least one processor, a processor memory, an input-output controller, and a directly-addressable storage device having volatile memory and non-volatile memory. The input-output controller generates a plurality of write commands in conjunction with storage of data in the storage system, the write commands including at least a first write command comprising the data and a second write command comprising one or more interrupts. If an address of a given one of the write commands falls within a specified interrupt group window, the write command is copied to the directly-addressable storage device so as to provide at least one of the one or more interrupts to that storage device. The directly-addressable storage device responds to receipt of the interrupt by writing data from the volatile memory to the non-volatile memory and generating a corresponding additional interrupt to the processor.Type: GrantFiled: June 30, 2016Date of Patent: June 12, 2018Assignee: EMC IP Holding Company LLCInventors: Steven Sardella, Walter A. O'Brien, III
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Patent number: 9971709Abstract: Described are techniques for migrating data. A source data storage system includes a source device and a target data storage system includes a target device. A passive path and an active path are provided for a host to access data of a logical device. The host recognizes the passive path and the active path as paths to the logical device. The passive path is between the host and the source data storage system. The active path is between the host and the target data storage system and used in connection with proxying at least some requests directed to the logical device received from the host through the target data storage system while migrating data for the logical device from the source device to the target device. Migrating is performed to migrate data for the logical device from the source device to the target device. Migrating is controlled by a migration module executing on the target data storage system that copies data from the source device to the target device.Type: GrantFiled: September 29, 2015Date of Patent: May 15, 2018Assignee: EMC IP Holding Company LLCInventors: Matthew Long, Roy E. Clark, Dennis Duprey, David Harvey, Walter A. O'Brien, III
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Utilizing flash optimized layouts which minimize wear of internal flash memory of solid state drives
Patent number: 9959058Abstract: A technique is directed to managing data. The technique involves identifying a logical page size utilized by a set of SSDs and, based on a first data storage application which stores first data elements in a set of hard disk drives (HDDs), creating a second data storage application which stores second data elements in the set of SSDs. Each first data element has a first size which is larger than the logical page size utilized by the set of SSDs. Each second data element has a second size which is equal to the logical page size utilized by the set of SSDs. The technique further involves operating, by processing circuitry coupled to the set of SSDs, the second application to store the second data elements in the set of SSDs. Such a technique is well-suited for a data storage system that stores host data in an array of SSDs.Type: GrantFiled: March 31, 2016Date of Patent: May 1, 2018Assignee: EMC IP Holding Company LLCInventors: Walter O'Brien, Philippe Armangau -
Patent number: 9940280Abstract: An electronic assembly perform data storage operations on behalf of a set of storage processors (SPs). The electronic assembly includes an enclosure, and a set of peripheral component interconnect express (PCIe) switches which installs within the enclosure. The set of PCIe switches is constructed and arranged to connect to the set of SPs while the set of SPs is external to the enclosure. The electronic assembly further includes a set of data storage devices which installs within the enclosure. The set of data storage devices is constructed and arranged to persistently store data on behalf of the set of SPs via PCIe-based communications through the set of PCIe switches.Type: GrantFiled: June 26, 2015Date of Patent: April 10, 2018Assignee: EMC IP Holding Company LLCInventors: Walter O'Brien, David W. Harvey, Robert W. Beauchamp, Steven D. Sardella, Antonio L. Fontes
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Patent number: 9916371Abstract: A method includes receiving a copy command, by a primary data storage device, to copy a data portion stored on the primary data storage device to another location on the primary data storage device; determining, with a mirroring module, whether a local copy of the data portion is stored on a secondary data storage device and whether the another location on the primary data storage device is mirrored by the secondary data storage device, the secondary data storage device at least partially mirroring the primary data storage device; and if the local copy of the data portion is stored on the secondary data storage device and the another location is mirrored by the secondary data storage device, sending a second command to the secondary data storage device to copy the local copy of the data portion to another location on the secondary data storage device.Type: GrantFiled: December 30, 2010Date of Patent: March 13, 2018Assignee: EMC IP Holding Company LLCInventors: Walter A. O'Brien, III, Dennis Duprey
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Patent number: 9864688Abstract: Described are techniques for processing data. A notification is sent from an application to a cache manager to invalidate any cache location storing data for a first logical address. Responsive to receiving the notification, first processing is performed by the cache manager comprising determining whether data for the first logical address is stored in a cache location; and if it is determined that data for the first logical address is stored in the cache location, designating the cache location as any of free and available for reuse. The foregoing processing for invalidation may also be performed to invalidate a set of cache locations for data from multiple logical addresses.Type: GrantFiled: June 26, 2015Date of Patent: January 9, 2018Assignee: EMC IP Holding Company LLCInventors: Walter O'Brien, Philippe Armangau
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Patent number: 9864533Abstract: A method, computer program product, and computing system for initiating a relocation process to move local data from an SMR-based storage tier within an auto-tiering data system to a different storage tier within the auto-tiering data system. The local data is located within one or more sectors of the SMR-based storage tier. The local data is copied from the SMR-based storage tier to the different storage tier. The one or more sectors of the SMR-based storage tier are unmapped.Type: GrantFiled: March 28, 2016Date of Patent: January 9, 2018Assignee: EMC IP Holding Company LLCInventors: Walter A. O'Brien, Thomas E. Linnell
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Patent number: 9785366Abstract: A method of writing data to persistent storage includes (a) for each data block of a set of data blocks, storing data of that data block at an offset within a log segment of the persistent storage in conjunction with a logical block address (LBA) of that data block on the persistent storage, a size of the log segment being larger than a size of each data block, (b) identifying a particular log segment of the persistent storage that has become filled with data blocks, and (c) upon identifying the particular log segment as having become filled, inserting pointers to respective data blocks stored within the particular log segment into respective locations defined by the respective LBA of each respective data block within a map tree.Type: GrantFiled: December 30, 2015Date of Patent: October 10, 2017Assignee: EMC IP Holding Company LLCInventors: Steven Morley, Daniel Cummins, Peter Puhov, Walter O'Brien, Sudhir Srinivasan
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Patent number: 9459809Abstract: A technique is used for optimizing data location in data storage arrays. A primary storage array is associated with a secondary storage array, the primary storage array and secondary storage array including auto-tiering functionality, where the secondary storage array is configured as a backup storage array for the primary storage array. Tiering metadata is derived for a storage object stored on the primary storage array. The tiering metadata is transmitted to the secondary storage array. Auto-tiering is initiated at the secondary storage array, where the received tiering metadata is provided as input to the secondary storage array's auto-tiering function when auto-tiering replicated storage object associated with the tiering metadata.Type: GrantFiled: June 30, 2014Date of Patent: October 4, 2016Assignee: EMC CorporationInventors: Xiangping Chen, Miles A. de Forest, Dennis T. Duprey, Karl M. Owen, Jean-Pierre Bono, Walter A. O'Brien, III
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Publication number: 20160253116Abstract: A method, computer program product, and computing system for initiating a relocation process to move local data from an SMR-based storage tier within an auto-tiering data system to a different storage tier within the auto-tiering data system. The local data is located within one or more sectors of the SMR-based storage tier. The local data is copied from the SMR-based storage tier to the different storage tier. The one or more sectors of the SMR-based storage tier are unmapped.Type: ApplicationFiled: March 28, 2016Publication date: September 1, 2016Inventors: Walter A. O'Brien, Thomas E. Linnell
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Patent number: 9317216Abstract: A method, computer program product, and computing system for initiating a relocation process to move local data from an SMR-based storage tier within an auto-tiering data system to a different storage tier within the auto-tiering data system. The local data is located within one or more sectors of the SMR-based storage tier. The local data is copied from the SMR-based storage tier to the different storage tier. The one or more sectors of the SMR-based storage tier are unmapped.Type: GrantFiled: December 20, 2013Date of Patent: April 19, 2016Assignee: EMC CorporationInventors: Walter A. O'Brien, Thomas E. Linnell
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Patent number: 9298636Abstract: A method and a system for use in managing data storage is disclosed. Data storage is managed in a data storage system comprising a first and a second storage processor and a plurality of data storage devices. The first and the second storage processor having respective caches configured to mirror each other. A write I/O is received in the data storage system, wherein the write I/O is an operation for updating data storage in the data storage system. Load associated with the first and second storage processor in the data storage system is determined. The cache is bypassed and write I/O is delivered to the plurality of data storage devices in the data storage system in response to determining a heavy load associated with the first and second storage processor in the data storage system.Type: GrantFiled: September 29, 2011Date of Patent: March 29, 2016Assignee: EMC CorporationInventors: Walter A O'Brien, III, Thomas N Dibb
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Patent number: 9286226Abstract: A method for upgrading storage processors in a storage system includes a first storage processor performing IO requests on a first one or more logical units, and a second storage processor performing IO requests on a second one or more logical units of the plurality of logical units. The method includes causing the first storage processor to stop performing the IO requests on the first one or more logical units and the second storage processor to perform the IO requests on the first one or more logical units. The method includes causing the second storage processor to stop performing the IO requests on the first one or more logical units of the plurality of logical units and a third storage processor to perform the IO requests on the first one or more logical units.Type: GrantFiled: March 31, 2014Date of Patent: March 15, 2016Assignee: EMC CorporationInventors: Walter A. O'Brien, III, David W. Harvey, Jeffrey A. Brown, Henry Austin Spang, IV