Abstract: A memory is formed from an array of switchless integrated circuit memory cells in a high-density configuration. These cells comprise a capacitor and two diodes in a configuration where one diode is used to charge one pole of the capacitor, and the other diode is used to discharge it from that same pole, over separate paired lines used respectively for charging and discharging, as well as reading. The other pole of the capacitor is tied to a single line used for both charging and discharging, and in support of reading. Drive and sense circuitry located at the periphery of the cell array is used to perform interconnect switching functions while writing or reading charges on cells in the array. Alternative high-density switched cell variations are also described. The cell arrays are fabricated on monolithic integrated circuits which are interconnected with one another by using a method which deposits and etches conductive material which links conductive traces between the monolithic dice.