Patents by Inventor Walter S. Gontowski

Walter S. Gontowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6504328
    Abstract: A motor control circuit wherein Bemf zero crossings are sensed to provide phasing information. To avoid incorrect timing (due to detection of zero crossings which may be caused by switching noise when the power transistors switch to commutate other phases), the Bemf detection is masked. Advantageously, the Bemf detection is masked not only for the normal masking period (including an additional percentage beyond the minimum period), but is also for an additional period, if the Bemf output is not of the expected polarity.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: January 7, 2003
    Assignee: STMicroelectronics Inc.
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 5877914
    Abstract: An amplifier in which a clamping circuit is an integral part of the output stage structure is used as a voice coil driver for positioning the heads of a memory disk drive. The output stage, operating in class AB, comprises two bipolar transistors, the source and the sink transistors, serially connected between a power supply and a ground terminal, the serial connection between the emitter of the first transistor and the collector of the second transistor being the output terminal of the output stage. The base terminals of the two output transistors are connected to a bias circuit and to an input transistor, used as the signal control element. The clamping circuit is directly connected with the base terminals of the output transistors to limit the voltage on said base terminals between a first and a second voltage reference.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: March 2, 1999
    Assignee: STMicroelectronics, Inc.
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 5862301
    Abstract: A motor control circuit, including a filter amplifier which includes a clamping circuit to limit the maximum voltage of the filter amplifier. The filter amplifier is clamped to essentially the same level as the following error amplifier, which drives the power transistor which drives the motor. Thus, the requisite control voltage is normally present anyway (since this voltage is used to limit the amount of maximum current in the motor). Since the corresponding level of current is selected to ensure adequate current during start up, this signal is therefore appropriate to limit the output voltage of the filter amplifier. This improvement adds very little circuit complexity, and reduces the settling time of the motor controller at startup.
    Type: Grant
    Filed: October 21, 1993
    Date of Patent: January 19, 1999
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 5192901
    Abstract: In the transistor power output stages disclosed herein, short-circuit protection is provided with respect to output terminals through which a reversible motor or other load is to be energized. An output stage connected between the load and one of the supply leads provides current gain for energizing the load at a current level which is a function of the level of drive current provided to the output stage. Drive current is provided only at a first level independently of the voltage at the output terminal and a sensing means provides drive current at an increased level when the voltage at the output terminal is in a normal range, e.g. close to the voltage at the respective supply lead.
    Type: Grant
    Filed: March 16, 1990
    Date of Patent: March 9, 1993
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 5142217
    Abstract: A pulse width modulated power supply controller is disclosed which is capable of generating synchronization pulses in such a manner that multiple ones of such power supply controllers in a system are synchronized to the controller having the highest oscillation frequency, without requiring one of the controllers to be implemented as a master and the others implemented as slaves. The power supply controller includes two comparators which are coupled to receive the external capacitor voltage. A first comparator enables a fast charging circuit, such as a current source, for increasing the rate at which the capacitor is charged responsive to the capacitor voltage reaching a first threshold; a single-ended or differential synchronization pulse is also generated, and communicated to the first comparators of other power supply controllers in a multiple controller system.
    Type: Grant
    Filed: March 7, 1991
    Date of Patent: August 25, 1992
    Assignee: SGS-Thomson Microelectronics, Inc.
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4999527
    Abstract: The one-shot multivibrator disclosed herein provides precise timing at high speed by controlling the charging and discharging of a timing capacitor over a voltage swing which is compensated so as to be essentially independent of any temperature-dependent offset voltages such as base-emitter drops.
    Type: Grant
    Filed: May 25, 1989
    Date of Patent: March 12, 1991
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski
  • Patent number: 4931750
    Abstract: In the voltage controlled oscillator disclosed herein, the charging and discharging of a timing capacitor is controlled by a differential input comparator which establishes precisely defined switching thresholds. The comparator input circuit is provided with an internally generated, temperature compensated input bias current which substantially relieves the timing components from providing bias current, thereby facilitating a wide range of operation.
    Type: Grant
    Filed: May 25, 1989
    Date of Patent: June 5, 1990
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski
  • Patent number: 4916332
    Abstract: A supply bias circuit in which supply current is provided through a resistor coupled to a timing circuit such that this resistor acts as a low pass filter in conjunction with the timing capacitor. Supply current is passed from the timing current through a second resistor and into logic circuitry. The logic circuitry is further connected to the timing circuitry so that it receives extra current each time the capacitor discharges.
    Type: Grant
    Filed: March 21, 1989
    Date of Patent: April 10, 1990
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski
  • Patent number: 4887022
    Abstract: The under voltage lockout circuit disclosed herein is useful in a switching mode power supply of the type which, in operation, powers its own regulator circuitry. The lockout circuit operates to inhibit energization of the power supply, including its own regulator, until a voltage reference is established which can control the operation of a comparator which monitors the supply voltage available to the regulator circuitry.
    Type: Grant
    Filed: June 1, 1989
    Date of Patent: December 12, 1989
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski
  • Patent number: 4885525
    Abstract: In the voltage controlled current source disclosed herein, temperature compensation is provided by offsetting base emitter voltage drops in a pair of bipolar transistors of complementary conductivity types. The control voltage is applied through a resistor to the emitter of a first transistor connected in common base mode. The base voltage of the first transistor is obtained from the emitter of a transistor of complementary conductivity type, the base of which is connected to a stable voltage source. The collector current of the first transistor is then applied to a current mirror to obtain an output current which is highly proportional to the control voltage.
    Type: Grant
    Filed: April 26, 1989
    Date of Patent: December 5, 1989
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4820935
    Abstract: An integrated circuit for driving five external signalling components such as four LEDs and a piezo horn. The integrated circuit includes three pairs of series connected transistors, each pair being connected in parallel to one another. Only three terminals are required for controlling the four LEDs and piezo horn.
    Type: Grant
    Filed: February 5, 1988
    Date of Patent: April 11, 1989
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski
  • Patent number: 4819122
    Abstract: A modulator circuit for providing a modulating signal to the timing circuit in a constant off time current mode controller so as to extend the off time in response to an overload condition. A switch connects the output voltage from a current sense amplifier to the modulator circuit when the current mode controller requests maximum current. An overload condition exists when the voltage from the current sense amplifier exceeds a first threshold. The off time is extended to approach infinity when a second threshold is exceeded.
    Type: Grant
    Filed: April 2, 1987
    Date of Patent: April 4, 1989
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4791315
    Abstract: A cross-coupled latch circuit in which first and second switching transistors are each connected as a current mirror with a diode. The base of each switching transistor is cross-coupled to the collector of the other switching transistor by a resistor and a diode. The collector of each switching transistor is connected to the voltage source terminal by a resistor. The switching transistors are prevented from saturating in their low states so as to increase switching speed.
    Type: Grant
    Filed: June 4, 1987
    Date of Patent: December 13, 1988
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4740742
    Abstract: A start-up circuit for a voltage regulator having a first current mirror for providing start-up current and a second current mirror responsive to voltage output from said regulator for turning off said first current mirror when said regulator is close to regulation. The circuitry providing start-up current and the circuitry turning off the start-up current having substantially the same temperature coefficients.
    Type: Grant
    Filed: April 2, 1987
    Date of Patent: April 26, 1988
    Assignee: Cherry Semiconconductor Corporation
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4720689
    Abstract: A precision oscillator circuit with synchronous capability. The circuit receives a predetermined discharging voltage and a predetermined charging voltage for setting a precise discharging and charging rate. A comparator in the oscillator contains three transistors connected to each other at their emitters. A latch circuit is provided on two of the transistors for accelerating the speed with which they turn on. An overshoot correction circuit provides additional charging current when the timing capacitor has dropped below the valley voltage threshold. Synchronizing pulses are generated at the capacitor terminal to allow for a plurality of oscillators to operate synchronously when connected in parallel.
    Type: Grant
    Filed: February 10, 1987
    Date of Patent: January 19, 1988
    Assignee: Cherry Semiconductor Corporation
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4670721
    Abstract: An oscillator integrated circuit is disclosed in which a predetermined current is reliably established through a discharge transistor by zener zapping appropriate circuit components. In accordance with an embodiment, a plurality of zener diodes are provided in parallel with a plurality of resistors and one or more is shorted out to achieve a predetermined discharge current. In accordance with a second embodiment, the multiplication factor of the discharge transistor is set by trimming its emitters through zener zapping to obtain a predetermined discharge current.
    Type: Grant
    Filed: March 21, 1986
    Date of Patent: June 2, 1987
    Assignee: Cherry Semiconductor Corporation
    Inventors: Walter S. Gontowski, Jr., John G. Metro, Steven S. Yole
  • Patent number: 4598259
    Abstract: A sawtooth-voltage-generating oscillator has a high gain comparator circuit formed of two differentially-connected NPN transistors driven respectively by two PNP transistors that leads to a very linear ramping of the sawtooth waveform, and at the same time, provides a sawtooth voltage swing at low supply voltages that may be within no more than 1.5 volts less than that low supply voltage. This oscillator also has the capability of working in the feed forward mode in a switching mode power supply while maintaining a stable oscillation frequency over a wide range of supply voltages.
    Type: Grant
    Filed: December 5, 1984
    Date of Patent: July 1, 1986
    Assignee: Sprague Electric Company
    Inventor: Walter S. Gontowski, Jr.
  • Patent number: 4494088
    Abstract: A silicon integrated oscillator circuit is connected with a capacitor and produces a highly precise and stable triangular output voltage. Both the charge current and the discharge current are proportional to one reference current. A switching circuit terminates the charge and discharge intervals when the capacitor voltage reaches a level that is equal to intermediate points on first and second resistive-voltage-divider circuits, respectively. This is accomplished by a differential-transistor-pair comparator having the base of one transistor connected to a high voltage one of the reference points and a third transistor, which is connected collector to emitter across the one transistor, having a base connected to a low voltage one of the reference points.
    Type: Grant
    Filed: July 26, 1982
    Date of Patent: January 15, 1985
    Assignee: Sprague Electric Company
    Inventors: Walter S. Gontowski, Jr., George E. Rollins
  • Patent number: 4485301
    Abstract: An integrated circuit includes a principal photo diode connected to the input of a multistage current mirror amplifier. Darlington cascode circuits are integrated into the output branches of the amplifying stages to obviate nonlinear sensitivity of those stages due to Early effect. Each of the cascode circuits have their input base tied to the top end of a diode string through which a current proportional to the photo current is flowing. Thus, there is no DC component in the two supply terminals; in a dark ambient, no supply/signal current flows; and in a light ambient, the supply/signal current is directly proportional to the light intensity.
    Type: Grant
    Filed: February 1, 1982
    Date of Patent: November 27, 1984
    Assignee: Sprague Electric Company
    Inventors: Walter S. Gontowski, Jr., Edward Chalfin
  • Patent number: 4467191
    Abstract: An integrated circuit photo sensor has a principal photo diode whose reverse voltage is maintained at a low and relatively invariant value by a circuit comprised of a biasing diode string in series with a small auxiliary photo diode and an emitter follower coupling the diode string bias voltage to the principal photo diode. This results in reliable starting without contributing a DC component of current in the power supply so this circuit is suitable for use in a linear two-terminal-type integrated-circuit photo sensor.
    Type: Grant
    Filed: February 1, 1982
    Date of Patent: August 21, 1984
    Assignee: Sprague Electric Company
    Inventors: Edward Chalfin, Walter S. Gontowski, Jr.