Patents by Inventor Walter Wallach

Walter Wallach has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020013519
    Abstract: A system and method for a physician to cause a sleep test device to be delivered to a patient, for retrieving the collected data (and optionally the test device), and for the controlled and secure distribution of the results of the test collection to the physician. The system includes a user interface coupled to a network, including a test ordering system, a verification system and a database including patient, test and physician records; a shipping system, coupled to the ordering system, delivering the test apparatus to the patient; a retrieval system, coupled to the ordering system; and a result delivery system, delivering the results to the physician.
    Type: Application
    Filed: June 14, 2001
    Publication date: January 31, 2002
    Inventors: Scott Adams, Walter Wallach
  • Patent number: 6338150
    Abstract: A network of microcontrollers for monitoring and diagnosing the environmental conditions of a computer is disclosed. The network of microcontrollers provides a management system by which computer users can accurately gauge the health of their computer. The network of microcontrollers provides users the ability to detect system fan speeds, internal temperatures and voltage levels. The invention is designed to not only be resilient to faults, but also allows for the system maintenance, modification, and growth—without downtime. Additionally, the present invention allows users to replace failed components, and add new functionality, such as new network interfaces, disk interface cards and storage, without impacting existing users. One of the primary roles of the present invention is to manage the environment without outside involvement. This self-management allows the system to continue to operate even though components have failed.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: January 8, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Karl S. Johnson, Walter A. Wallach, Ken Nguyen, Carlton G. Amdahl
  • Publication number: 20010052042
    Abstract: A software architecture for the hot add and swap of adapters. The software architecture allows users to replace failed components, upgrade outdated components, and add new functionality, such as new network interfaces, disk interface adapters and storage, without impacting existing users. The software architecture supports the hot add and swap of off-the-shelf adapters, including those adapters that are programmable.
    Type: Application
    Filed: June 19, 2001
    Publication date: December 13, 2001
    Inventors: Walter A. Wallach, Mehrdad Khalili, Mallikarjunan Mahalingam, John M. Reed
  • Patent number: 6314525
    Abstract: The present invention provides a method and an apparatus for allowing a plurality of network interface controllers (NICs) to appear as a single NIC to an operating system. This method and apparatus is realized externally to the NIC driver software, and thus does not require NIC drivers to be modified. The present invention also operates independently of operating system, NIC driver software, NIC drivers and NIC hardware. Consequently, the present invention is compatible with a wide range of operating systems and NICs. One embodiment of the present invention operates at the MAC level and lower, thus avoiding the complexity of providing software support for higher layer protocols. However, providing support at the MAC level and lower makes it difficult to perform inbound load sharing. This is because protocols such as IPX use addresses and packet headers to direct reply packets. Hence, return traffic is directed back to the originating NIC regardless of whether the originating NIC is heavy loaded or not.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: November 6, 2001
    Assignee: 3Com Corporation
    Inventors: Mallikarjunan Mahalingham, Walter A. Wallach
  • Patent number: 6298409
    Abstract: A system for monitoring issuance of interrupt and transaction commands without involving central processor units of computer systems. The system employs a fabric controller to manage transaction commands among and host devices. The system employs an interrupt controller to manage interrupt commands issued by devices. The system further employs a concurrent bridge to support communication between the controllers and at least one host device. With this system, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: October 2, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Tahir Q. Sheikh, Walter A. Wallach
  • Publication number: 20010025329
    Abstract: A method and system for managing communications among computer devices without involving central processor units of computer systems when it is determined that involving a central processor unit is unnecessary. The method employs a controller to manage communications among peer and host devices. With this method, congestion due to control and data traffic is minimized and a more efficient operation of central processor units is achieved.
    Type: Application
    Filed: May 11, 2001
    Publication date: September 27, 2001
    Applicant: Micron Technology, Inc. a Delaware Corporation
    Inventors: Tahir Q. Sheikh, Walter A. Wallach
  • Patent number: 6292905
    Abstract: The method of the current invention provides a fault tolerant access to a network resource. A replicated network directory database operates in conjunction with server resident processes to remap a network resource in the event of a server failure. The records/objects in the replicated database contain for each network resource, a primary and a secondary server affiliation. Initially, all users access a network resource through the server identified in the replicated database as being the primary server for the network resource. When server resident processes detect a failure of the primary server, the replicated database is updated to reflect the failure of the primary server, and to change the affiliation of the network resource from its primary to its backup server. This remapping occurs transparently to whichever user/client is accessing the network resource.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: September 18, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Walter A. Wallach, Bruce Findlay, Thomas J. Pellicer, Michael Chrabaszcz
  • Patent number: 6249885
    Abstract: A network of microcontrollers for monitoring and diagnosing the environmental conditions of a computer is disclosed. The network of microcontrollers provides a management system by which computer users can accurately gauge the health of their computer. The network of microcontrollers provides users the ability to detect system fan speeds, internal temperatures and voltage levels. The invention is designed to not only be resilient to faults, but also allows for the system maintenance, modification, and growth—without downtime. Additionally, the present invention allows users to replace failed components, and add new functionality, such as new network interfaces, disk interface cards and storage, without impacting existing users. One of the primary roles of the present invention is to manage the environment without outside involvement. This self-management allows the system to continue to operate even though components have failed.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: June 19, 2001
    Inventors: Karl S. Johnson, Walter A. Wallach, Ken Nguyen, Carlton G. Amdahl
  • Patent number: 6247079
    Abstract: Apparatus and method is disclosed for providing hot-add and hot swap capability to a computer system with a processor, and a memory, connected to a system bus. The apparatus includes a first bus, an adapter card slot, a switchable interface unit and hot-swap hot-add program code means. The first bus is connected to the system bus. The adapter card slot has a first port and a second port. The switchable interface unit includes a primary port and a secondary port. The primary port is connected to the first bus and the secondary port is connected to the first port of the adapter card slot. The switchable interface unit is responsive to a hot-swap hot-add power-down request to disconnect the second port from the first bus. The switchable interface unit is also responsive to a power-up request to reconnect the second port to the first bus.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: June 12, 2001
    Assignee: Micron Electronics, INC
    Inventors: Stephen E. J. Papa, Dennis H. Smith, Walter A. Wallach
  • Patent number: 6199173
    Abstract: A network of microcontrollers for monitoring and diagnosing the environmental conditions of a computer is disclosed. The network of microcontrollers provides a management system by which computer users can accurately gauge the health of their computer. The network of microcontrollers provides users the ability to detect system fan speeds, internal temperatures and voltage levels. The invention is designed to not only be resilient to faults, but also allows for the system maintenance, modification, and growth—without downtime. Additionally, the present invention allows users to replace failed components, and add new functionality, such as new network interfaces, disk interface cards and storage, without impacting existing users. One of the primary roles of the present invention is to manage the environment without outside involvement. This self-management allows the system to continue to operate even though components have failed.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: March 6, 2001
    Assignee: Micron Electronics, Inc.
    Inventors: Karl S. Johnson, Walter A. Wallach, Ken Nguyen, Carlton G. Amdahl
  • Patent number: 6167446
    Abstract: Generally a computer network includes a file server (22), a network (26), and several client workstations (24). Specific network software provides a name server ("NS") (122) to resolve network-name requests. The computer network can also include a proxy for a network service, e.g. a network infrastructure cache (72) that stores files copied from the server (22). Automatic network-name-services configuration adds to this:1. a traffic-monitor module (132) that identifies shared network services, and collects service use data;2. a dynamic redirection service ("DRS") module (126) that receives the collected data, extracts therefrom pairs of client workstations (24) and services, employs a performance metric to order those pairs, and compiles a list (138) of workstations (24) and services that are assigned to the proxy; and3.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: December 26, 2000
    Assignee: INCA Technology, Inc.
    Inventors: Robert Lister, Joel R. Rigler, William M. Pitts, Walter A. Wallach
  • Patent number: 6122758
    Abstract: A network of microcontrollers for monitoring and diagnosing the environmental conditions of a computer is disclosed. The network of microcontrollers provides a management system by which computer users can accurately gauge the health of their computer. The network of microcontrollers provides users the ability to detect system fan speeds, internal temperatures and voltage levels. The invention is designed to not only be resilient to faults, but also allows for the system maintenance, modification, and growth--without downtime. Additionally, the present invention allows users to replace failed components, and add new functionality, such as new network interfaces, disk interface cards and storage, without impacting existing users. One of the primary roles of the present invention is to manage the environment without outside involvement. This self-management allows the system to continue to operate even though components have failed.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: September 19, 2000
    Assignee: Micron Electronics, Inc.
    Inventors: Karl S. Johnson, Walter A. Wallach, Ken Nguyen, Carlton G. Amdahl
  • Patent number: 6105151
    Abstract: A system is described for providing fault tolerance within a computer system. The system provides a method for allowing multiple network interface cards to reside within the same computer system. If the primary network interface card fails, a secondary network interface card automatically begins managing the network communications. In addition, a system that provides load-sharing of data transmissions between each network interface card installed in a server computer is described.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: August 15, 2000
    Assignee: 3Com Corporation
    Inventors: Mallikarjunan Mahalingam, Walter A. Wallach
  • Patent number: 5892928
    Abstract: A software architecture for the hot add and swap of adapters. The software architecture allows users to replace failed components, upgrade outdated components, and add new functionality, such as new network interfaces, disk interface adapters and storage, without impacting existing users. The software architecture supports the hot add and swap of off-the-shelf adapters, including those adapters that are programmable.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: April 6, 1999
    Assignee: Micron Electronics, Inc.
    Inventors: Walter A. Wallach, Mehrdad Khalili, Mallikarjunan Mahalingam, John M. Reed
  • Patent number: 5889965
    Abstract: A software architecture for the hot add and swap of adapters. The software architecture allows users to replace failed components, upgrade outdated components, and add new functionality, such as new network interfaces, disk interface adapters and storage, without impacting existing users. The software architecture supports the hot add and swap of off-the-shelf adapters, including those adapters that are programmable.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: March 30, 1999
    Assignee: Micron Electronics, Inc.
    Inventors: Walter A. Wallach, Mehrdad Khalili, Mallikarjunan Mahalingam, John M. Reed
  • Patent number: 4803619
    Abstract: Apparatus in a digital computer system capable of performing a call operation and a return operation for obtaining addresses of data from names representing the data. Each name is permanently associated with a procedure containing instructions to which the digital computer system responds. Each name further corresponds to a name table entry which is permanently associated with the same procedure. The corresponding name table entry for a name specifies how a base address and a displacement are to be derived using a plurality of current base addresses. The values of these addresses change only when the computer system executes a call operation suspending a current execution of a procedure and commencing another current execution or a return operation terminating the current execution and resuming the execution which was suspended to commence the terminated execution. The operation of resolving a name, i.e.
    Type: Grant
    Filed: June 20, 1986
    Date of Patent: February 7, 1989
    Inventors: David H. Bernstein, Walter A. Wallach, Michael S. Richmond, John K. Ahlstrom, John F. Pilat, David A. Farber, Richard A. Belgard, Richard G. Bratt
  • Patent number: 4736287
    Abstract: A memory system for use in a computer which in the preferred embodiment provides two megabytes of capacity per board (up to four boards) is disclosed. An ALU generates an address signal which selects a number of set locations in the main memory. Simultaneously, a portion of the address field is fed to a set association logic circuit for parallel processing. The set association circuit contains tag storage memories and comparators which store tag values. These values are compared with address fields, and if a match occurs, one of the comparators selects a 128-bit word from the main memory. A hash function is also used to provide for dispersal of storage locations to reduce the number of collisions of frequently used addresses. Because of hardware implementation of hashing and least recently used (LRU) algorithm, a constant predetermined cycle time is realized since all accessing functions occur substantially in parallel.
    Type: Grant
    Filed: November 14, 1986
    Date of Patent: April 5, 1988
    Assignee: Rational
    Inventors: Michael B. Druke, Walter A. Wallach
  • Patent number: 4731734
    Abstract: A digital computer system having a memory system organized into objects for storing data and a processor for processing data in response to instructions. An object identifier and an access control list are associated with each object. The memory system responds to logical addresses for data which specify the object containing the data and the offset of the data in the object and to a current subject for which the processor is referencing the data. The memory system performs a memory operation for the processor only if the access control list for the object specified by the logical address allows the current subject to perform the desired memory operation. The objects include procedure objects and data objects. The procedure objects contain procedures including the instructions and name tables associated with the procedures. The instructions contain operations codes and names representing data. Each name corresponds to a name table entry in the name table associated with the procedure.
    Type: Grant
    Filed: February 14, 1986
    Date of Patent: March 15, 1988
    Assignee: Data General Corporation
    Inventors: Ronald H. Gruner, Gerald F. Clancy, Craig J. Mundie, Stephen I. Schleimer, Steven J. Wallach, Richard G. Bratt, Edward S. Gavrin, Walter A. Wallach, Jr., John K. Ahlstrom, Michael S. Richmond, David H. Bernstein
  • Patent number: 4675810
    Abstract: A digital computer system having a memory system organized into procedure and data objects, each having a unique identifier code and an access control list, for storing items of information and a processor for processing data in response to instructions. The instructions contain operation codes and names representing data. Each name corresponds to a name table entry in a name table which contains information from which the processor determines the location and the format for the data. The name table entry specifies a base address of one of a set thereof which change value only when a call or a return instruction is executed. A name interpretation system fetches a name table entry, calculates the base address and a displacement using the name table entry and the current architectural base address and adds the base address to the displacement to form the address of the data represented by the name.
    Type: Grant
    Filed: May 22, 1981
    Date of Patent: June 23, 1987
    Assignee: Data General Corp.
    Inventors: Ronald H. Gruner, Gerald F. Clancy, Craig J. Mundie, Stephen I. Schleimer, Steven J. Wallach, Richard G. Bratt, Edward S. Gavrin, Walter A. Wallach, Jr., John K. Ahlstrom, Michael S. Richmond, David H. Bernstein, John F. Pilat, David A. Farber, Richard A. Belgard
  • Patent number: 4661903
    Abstract: Apparatus in a digital computer system for obtaining descriptors of data from names representing the data. The digital computer system executes sequences of instructions. Names representing data processed during execution of an instruction sequence are associated with the instruction sequence. Each name associated with the instruction sequence corresponds to a name table entry associated with the instruction sequence. The operation of resolving a name, i.e., obtaining the descriptor for the data represented by the name, is performed by name processing apparatus in processors of the data processing system. In response to a name, the name processing apparatus locates the name table entry corresponding to the name obtains the descriptor for the item represented by the name using the information in the name table entry corresponding to the name. In a present embodiment, the descriptor specifies the address and length of a data item.
    Type: Grant
    Filed: September 4, 1984
    Date of Patent: April 28, 1987
    Assignee: Data General Corporation
    Inventors: Walter A. Wallach, Jr., Michael S. Richmond, John K. Ahlstrom, David H. Bernstein, Richard G. Bratt