Patents by Inventor Wan Cheul Shin

Wan Cheul Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090218696
    Abstract: A semiconductor device includes bit lines formed over a substrate and a padding unit formed over the bit lines. The padding unit includes stacked padding layers. A lower padding layer is formed between the bit lines and an upper padding layer. The upper layer as a slit formed therein. The lower padding layer prevents damage to the bit lines due to plasma gas entering through the slit.
    Type: Application
    Filed: February 27, 2009
    Publication date: September 3, 2009
    Applicant: Hynix Semiconductor Inc.
    Inventors: Sun-Hwa JUNG, Wan-Cheul Shin