Abstract: The present specification relates to a composition for preventing, alleviating or treating burnout syndrome, containing a natural extract as an active ingredient. According to one aspect of the present invention, the composition contains a ginseng fruit extract, and thus is useful for preventing, treating and alleviating burnout syndrome. In addition, according to one aspect of the present invention, the composition further contains ginseng fruit and one or more selected from the group consisting of red ginseng, Angelica gigas, Cornus officinalis, Cervi parvum corni, and Nigella sativa, so as to maximize the synergistic effect among two or more ingredients, thereby exhibiting excellent effects on the prevention, treatment and alleviation of burnout syndrome. Therefore, there is an advantage of making individuals and society mentally and physically healthy since burnout syndrome can be prevented, treated and alleviated, by using the composition of the present invention.

Abstract: A method for manufacturing a semiconductor includes forming an active region for an ESD device, an active region for a first polygate and the semiconductor, and a second polygate having a form of a blanket trench on a substrate, forming an interlayer dielectric layer including first and second insulating on the substrate, planarizing the interlayer dielectric layer, forming a contact pattern to open a portion of the interlayer dielectric layer over the first polygate, forming a first polygate trench by performing a first etch process with respect to the second insulating layer below the contact pattern, and performing a second etch process to remove the first insulating layer inside the first polygate trench and to remove the first insulating layer over the active region of the semiconductor other than the second polygate.

Abstract: A method for manufacturing a semiconductor includes forming an active region for an ESD device, an active region for a first polygate and the semiconductor, and a second polygate having a form of a blanket trench on a substrate, forming an interlayer dielectric layer including first and second insulating on the substrate, planarizing the interlayer dielectric layer, forming a contact pattern to open a portion of the interlayer dielectric layer over the first polygate, forming a first polygate trench by performing a first etch process with respect to the second insulating layer below the contact pattern, and performing a second etch process to remove the first insulating layer inside the first polygate trench and to remove the first insulating layer over the active region of the semiconductor other than the second polygate.