Patents by Inventor Wan Hee Choi

Wan Hee Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240151440
    Abstract: An embodiment multi-way coolant valve includes an outer housing including first to third outer inlets, first to third outer outlets, and a pump mount portion coupled to one of the outer outlets, an inner housing rotatably provided within the outer housing and including penetration holes corresponding to the outer inlets and outlets, a coolant line defined by a selective connection of the penetration holes such that the outer inlets and outlets are selectively connected, pads interposed between an interior circumference of the outer housing and an exterior circumference of the inner housing at locations of the outer inlets and outlets, respectively, and a driving device connected to a rotation center of the inner housing to selectively rotate the inner housing within the outer housing, wherein the inner housing is configured to rotate by a preset interval according to a selected vehicle mode.
    Type: Application
    Filed: May 10, 2023
    Publication date: May 9, 2024
    Inventors: Wan Je Cho, Namho Park, Seong-Bin Jeong, Yeonho Kim, Tae Hee Kim, Jae-Eun Jeong, Man Hee Park, Jae Yeon Kim, Hyunjae Lee, Seong Woo Jeong, Jung Bum Choi, Ho Sung Kang, Jeong Wan Han
  • Publication number: 20240146103
    Abstract: Embodiments of the inventive concept provide a wireless power apparatus for a substrate treating apparatus and a manufacturing method for the wireless power apparatus for the substrate treating apparatus for preventing a heat generation by preventing a generation of an eddy current in a coupling element, if the coupling element is used around an outer housing at which an induced magnetic field is formed. The inventive concept provides a wireless power apparatus for a substrate treating apparatus.
    Type: Application
    Filed: April 26, 2023
    Publication date: May 2, 2024
    Applicant: SEMES CO., LTD.
    Inventors: Chan Young Choi, Ki Won Han, Wan Hee Jeong, Kyo Bong Kim, Hee Chan Kim, Doo Hyun Baek, Sang-Oh Kim, Hee Jae Byun
  • Publication number: 20240074258
    Abstract: An electronic device includes a display device, which may be fabricated using a described method. The display device includes a glass substrate including a first surface, a second surface opposite the first surface, and a side surface between the first surface and the second surface, an outermost structure on the first surface of the glass substrate and located adjacent to an edge of one side of the glass substrate, and a display area including a plurality of light emitting areas on the first surface of the glass substrate and located farther from the edge of the one side of the glass substrate than the outermost structure is. A minimum distance from the side surface of the glass substrate to the outermost structure is equal to 130 ?m or less.
    Type: Application
    Filed: May 5, 2023
    Publication date: February 29, 2024
    Inventors: Wan Jung KIM, Dong Jo KIM, Sun Hwa KIM, Young Ji KIM, Chang Sik KIM, Kyung Ah NAM, Hyo Young MUN, Yong Seung PARK, Yi Seul UM, Dae Sang YUN, Kwan Hee LEE, So Young LEE, Young Hoon LEE, Young Seo CHOI, Sun Young KIM, Ji Won SOHN, Do Young LEE, Seung Hoon LEE
  • Patent number: 7772834
    Abstract: A test handler includes a loading unit including a loading picker and a loading ascending/descending unit, an unloading unit including an unloading picker and an unloading ascending/descending unit, and a chamber system. A passage site connects the loading unit and the chamber system, and also connects the chamber system and the unloading unit. The arrangement of the handler reduces the time for the loading and unloading processes by performing the loading and unloading processes on separate test trays located at separate loading and unloading positions.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: August 10, 2010
    Assignee: Mirae Corporation
    Inventors: Jung Ug An, Wan Hee Choi, Hae Jun Park, Kyeong Tae Kim
  • Patent number: 7495463
    Abstract: A handler for handling semiconductor chips during a testing process includes a loading position at which packaged chips are loaded into a test tray, and an unloading position at which the packaged chips are unloaded from the test tray. The test tray follows a path through the handler from the loading position to the unloading position, and from the unloading position to the loading position. By separately performing the loading and unloading operations at these different positions within the handler, malfunctions in loading and unloading pickers that load and unload the chips may be reduced. Further, a malfunction in one picker performing one operation may be prevented from influencing operations of the other picker performing another operation. Additionally, collision between the loading picker and the unloading picker may be prevented.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: February 24, 2009
    Assignee: Mirae Corporation
    Inventors: Jung Ug An, Hae Jun Park, Kyung Min Hyun, Wan Hee Choi
  • Publication number: 20090033352
    Abstract: A test handler includes a loading unit including a loading picker and a loading ascending/descending unit, an unloading unit including an unloading picker and an unloading ascending/descending unit, and a chamber system. A passage site connects the loading unit and the chamber system, and also connects the chamber system and the unloading unit. The arrangement of the handler reduces the time for the loading and unloading processes by performing the loading and unloading processes on separate test trays located at separate loading and unloading positions.
    Type: Application
    Filed: July 30, 2008
    Publication date: February 5, 2009
    Inventors: Jung Ug AN, Wan Hee CHOI, Hae Jun PARK, Kyeong Tae KIM
  • Publication number: 20080297140
    Abstract: A handler for handling semiconductor chips during a testing process includes a loading position at which packaged chips are loaded into a test tray, and an unloading position at which the packaged chips are unloaded from the test tray. The test tray follows a path through the handler from the loading position to the unloading position, and from the unloading position to the loading position. By separately performing the loading and unloading operations at these different positions within the handler, malfunctions in loading and unloading pickers that load and unload the chips may be reduced. Further, a malfunction in one picker performing one operation may be prevented from influencing operations of the other picker performing another operation. Additionally, collision between the loading picker and the unloading picker may be prevented.
    Type: Application
    Filed: February 28, 2008
    Publication date: December 4, 2008
    Inventors: Jung Ug AN, Hae Jun Park, Kyung Min Hyun, Wan Hee Choi
  • Publication number: 20080075574
    Abstract: Provided is a picker for transferring packaged chips, including a picker base, a base block fixably connected to the picker base, a plurality of nozzle assemblies, provided to the base block, each nozzle assembly being movable up and down, and having a nozzle which a packaged chip is held against or released from by air pressure, an air pressure supplying unit supplying negative or positive pressure by which the packaged chip is held against or released from the nozzle, a plurality of first mechanisms, through each of which the negative or positive pressure is supplied to the nozzle; and a plurality of second mechanisms, each of which moves up and down each of nozzle assemblies.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 27, 2008
    Inventors: Jung-ug AHN, Sun-hwal Kim, Wan-hee Choi, Jung Hur
  • Publication number: 20080074120
    Abstract: Provided is a pushing block for use in a handle and a handler equipped with the pushing block. The pushing block includes pushing pins, provided under the test tray, each pushing the latch upwards from under the test tray to enable the latch to release the packaged chip, a first plate on which the pushing pins are provided, and an assembly changing horizontal motion into vertical motion to move the first plate vertically. Positioning of the pushing block under the test tray prevents interference between the pushing block and the picker during loading and unloading and makes it convenient to take corrective action when malfunction of the picker occurs.
    Type: Application
    Filed: September 20, 2007
    Publication date: March 27, 2008
    Inventors: Jung-ug AHN, Sun-hwal Kim, Wan-hee Choi, Jung Hur
  • Publication number: 20080071409
    Abstract: A handler is provided, including a chamber in which to-be-tested packaged chips contained in a test tray are connected to sockets of a test board, an exchanging unit exchanging the test trays with the chamber; a transferring unit transferring the test tray containing the to-be-tested packaged chips from the exchanging unit to the chamber, and transferring the test tray containing tested packaged chips from the chamber to the exchanging unit, a picker removing the tested packaged chips from the test tray staying in the exchanging unit and putting the to-be-tested packaged chips into the test tray staying in the exchanging unit; and an inserting unit including a pusher pushing the test tray to connect the to-be-tested packaged chips to the sockets of the test board, a pusher driving unit driving the pusher, a sensor sensing an amount of pressure applied by the pusher to the test tray; and a controller controlling the pusher driving unit to enable the pusher to apply a proper amount of pressure to the test tray.
    Type: Application
    Filed: September 19, 2007
    Publication date: March 20, 2008
    Inventors: Jung-ug AHN, Sun-hwal Kim, Wan-hee Choi, Jung Hur