Patents by Inventor Wan-Jun Hong
Wan-Jun Hong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12135900Abstract: A memory polling method, a memory storage device and a memory control circuit unit are provided. The memory polling method includes: detecting a plurality of busy times corresponding to a plurality of physical units when executing a plurality of first commands; counting the busy times corresponding to the physical units to generate a count statistic value, and determine a delay time based on the count statistic value; and transmitting a plurality of status requests to a rewritable non-volatile memory module after the delay time.Type: GrantFiled: October 13, 2021Date of Patent: November 5, 2024Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Kuai Cao, Xin Wang, Xu Hui Cheng, Wan-Jun Hong
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Publication number: 20240295982Abstract: A memory operation control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes the following. Management data is established, which includes status recording data. First status information corresponding to a first physical unit is stored in the status recording data. An operation command is received from a host system. The management data is queried according to the operation command. Whether to allow an execution of the operation command on the first physical unit is determined according to a query result.Type: ApplicationFiled: April 10, 2023Publication date: September 5, 2024Applicant: Hefei Core Storage Electronic LimitedInventors: Chih-Ling Wang, Wan-Jun Hong, Qi-Ao Zhu, Yang Zhang, Xin Wang
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Patent number: 11983415Abstract: A memory management method for a memory storage device is provided. The memory management method includes: detecting effective information of at least one operation event performed by the memory storage device in a first mode; and adjusting a threshold value according to the effective information. The threshold value is configured to determine whether to instruct the memory storage device to enter the first mode.Type: GrantFiled: August 29, 2019Date of Patent: May 14, 2024Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Chong Peng, Zhi Wang, Wan-Jun Hong
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Patent number: 11803331Abstract: A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: performing a first write operation to store first data to a first physical unit; recording first unit management information corresponding to the first write operation, wherein the first unit management information reflects a usage order of first used physical units, and the first used physical units include the first physical unit; performing data merge operation to copy at least a part of data stored in the first physical unit to a second physical unit; and after the data merge operation is performed, recording second unit management information according to the first unit management information, wherein the second unit management information reflects a usage order of second used physical units. The second used physical units include the second physical unit but do not include the first physical unit.Type: GrantFiled: December 29, 2021Date of Patent: October 31, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Wan-Jun Hong, Yang Zhang, Wenbin Tao, Hao Yang, Mengkai Wu, Yankai Dai
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Publication number: 20230205451Abstract: A multi-channel memory storage device, a memory control circuit unit, and a data reading method are provided. The method includes: determining whether a storage space of a buffer memory is insufficient when a multi-channel access is performed; issuing a data read command corresponding to each of a plurality of multi-channels to a rewritable non-volatile memory module according to a logical address in a host read command in response to insufficient storage space of the buffer memory to read data corresponding to each of the plurality of multi-channels from a data storage area to a data cache area via the plurality of multi-channels; and allocating the storage space of the buffer memory to the rewritable non-volatile memory module after the storage space of the buffer memory is released and issuing a cache read command to move first data in data temporarily stored in the data cache area to the buffer memory.Type: ApplicationFiled: January 19, 2022Publication date: June 29, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Wan-Jun Hong, Qi-Ao Zhu, Xin Wang, Yang Zhang, Xu Hui Cheng, Jian Hu
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Publication number: 20230176782Abstract: A memory management method, a memory storage device and a memory control circuit unit are disclosed. The method includes: performing a first write operation to store first data to a first physical unit; recording first unit management information corresponding to the first write operation, wherein the first unit management information reflects a usage order of first used physical units, and the first used physical units include the first physical unit; performing data merge operation to copy at least a part of data stored in the first physical unit to a second physical unit; and after the data merge operation is performed, recording second unit management information according to the first unit management information, wherein the second unit management information reflects a usage order of second used physical units. The second used physical units include the second physical unit but do not include the first physical unit.Type: ApplicationFiled: December 29, 2021Publication date: June 8, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Wan-Jun Hong, Yang Zhang, Wenbin Tao, Hao Yang, Mengkai Wu, Yankai Dai
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Patent number: 11669270Abstract: A multi-channel memory storage device, a memory control circuit unit, and a data reading method are provided. The method includes: determining whether a storage space of a buffer memory is insufficient when a multi-channel access is performed; issuing a data read command corresponding to each of a plurality of multi-channels to a rewritable non-volatile memory module according to a logical address in a host read command in response to insufficient storage space of the buffer memory to read data corresponding to each of the plurality of multi-channels from a data storage area to a data cache area via the plurality of multi-channels; and allocating the storage space of the buffer memory to the rewritable non-volatile memory module after the storage space of the buffer memory is released and issuing a cache read command to move first data in data temporarily stored in the data cache area to the buffer memory.Type: GrantFiled: January 19, 2022Date of Patent: June 6, 2023Assignee: Hefei Core Storage Electronic LimitedInventors: Wan-Jun Hong, Qi-Ao Zhu, Xin Wang, Yang Zhang, Xu Hui Cheng, Jian Hu
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Publication number: 20230098366Abstract: A memory polling method, a memory storage device and a memory control circuit unit are provided. The memory polling method includes: detecting a plurality of busy times corresponding to a plurality of physical units when executing a plurality of first commands; counting the busy times corresponding to the physical units to generate a count statistic value, and determine a delay time based on the count statistic value; and transmitting a plurality of status requests to a rewritable non-volatile memory module after the delay time.Type: ApplicationFiled: October 13, 2021Publication date: March 30, 2023Applicant: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Kuai Cao, Xin Wang, Xu Hui Cheng, Wan-Jun Hong
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Patent number: 11281402Abstract: A memory management method. The memory management method includes: receiving a command from a host system; sending a command sequence corresponding to the command to a rewritable non-volatile memory module; determining a delay time; and sending a plurality of polling commands to the rewritable non-volatile memory module after the delay time.Type: GrantFiled: January 22, 2020Date of Patent: March 22, 2022Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Wan-Jun Hong, Ya-Lin Zhu, Tong-Jin Liu
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Patent number: 11175847Abstract: A data merging method for flash memory, a flash memory control circuit unit and a flash memory storage device are provided. The disclosure is applicable to a flash memory, an embedded memory device or a solid state drive of 3D structure. The method includes: selecting at least one source physical erasing unit from at least one first physical erasing unit according to a valid data count of the at least one first physical erasing unit and a valid data count of each of a plurality of memory sub-modules; and copying valid data in the at least one source physical erasing unit to at least one destination physical erasing unit to perform a valid data merging operation.Type: GrantFiled: March 18, 2020Date of Patent: November 16, 2021Assignee: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Wan-Jun Hong, Jing Zhang, Xin Wang, Xu Hui Cheng
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Publication number: 20210223976Abstract: A data merging method for flash memory, a flash memory control circuit unit and a flash memory storage device are provided. The disclosure is applicable to a flash memory, an embedded memory device or a solid state drive of 3D structure. The method includes: selecting at least one source physical erasing unit from at least one first physical erasing unit according to a valid data count of the at least one first physical erasing unit and a valid data count of each of a plurality of memory sub-modules; and copying valid data in the at least one source physical erasing unit to at least one destination physical erasing unit to perform a valid data merging operation.Type: ApplicationFiled: March 18, 2020Publication date: July 22, 2021Applicant: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Wan-Jun Hong, Jing Zhang, Xin Wang, Xu Hui Cheng
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Publication number: 20210181981Abstract: A memory management method. The memory management method includes: receiving a command from a host system; sending a command sequence corresponding to the command to a rewritable non-volatile memory module; determining a delay time; and sending a plurality of polling commands to the rewritable non-volatile memory module after the delay time.Type: ApplicationFiled: January 22, 2020Publication date: June 17, 2021Applicant: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Jing Zhang, Wan-Jun Hong, Ya-Lin Zhu, Tong-Jin Liu
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Publication number: 20210011630Abstract: A memory management method for a memory storage device is provided. The memory management method includes: detecting effective information of at least one operation event performed by the memory storage device in a first mode; and adjusting a threshold value according to the effective information. The threshold value is configured to determine whether to instruct the memory storage device to enter the first mode.Type: ApplicationFiled: August 29, 2019Publication date: January 14, 2021Applicant: Hefei Core Storage Electronic LimitedInventors: Qi-Ao Zhu, Chong Peng, Zhi Wang, Wan-Jun Hong