Patents by Inventor Wan Jung Hsieh

Wan Jung Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7812430
    Abstract: A lead frame with downset baffle paddles and a semiconductor package utilizing the same are revealed. The lead frame primarily comprises a plurality of leads formed on a first plane, a baffle paddle formed on a second plane in parallel, and an internal tie bar formed between the first plane and the second plane. The internal tie bar has at least two or more windings such as ā€œSā€ shaped to flexibly connect the baffle paddle to an adjacent one of the leads. Therefore, the internal tie bar can reduce the shifting and twisting of the connected lead during the formation of the downset of the baffle paddle.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: October 12, 2010
    Assignee: Powertech Technology Inc.
    Inventors: Chin-Fa Wang, Wan-Jung Hsieh, Yu-Mei Hsu
  • Publication number: 20090302443
    Abstract: A leadframe-based semiconductor package and a leadframe for the package are revealed. The semiconductor package primarily includes parts of the leadframe including one or more first leads, one or more second leads, and a supporting bar disposed between the first leads and the second leads and further includes a chip attached to the first leads, the second leads and the supporting bar, a plurality of bonding wires and an encapsulant. The supporting bar has an extended portion projecting from the first bonding finger and the second bonding finger and connected to a non-lead side of the encapsulant wherein the extended portion has an arched bend to absorb the pulling stresses and to block stress transmission. Cracks caused by delamination of the supporting bar will not be created during trimming the supporting bar along the non-lead side of the encapsulant. Moisture penetration along the cracks of the supporting bar to the die- bonding plane under the chip is desirably prevented.
    Type: Application
    Filed: June 5, 2008
    Publication date: December 10, 2009
    Inventors: Chin-Fa Wang, Wan-Jung Hsieh, Yu-Mei Hsu
  • Patent number: 7619307
    Abstract: A leadframe-based semiconductor package and a leadframe for the package are revealed. The semiconductor package primarily includes parts of the leadframe including one or more first leads, one or more second leads, and a supporting bar disposed between the first leads and the second leads and further includes a chip attached to the first leads, the second leads and the supporting bar, a plurality of bonding wires and an encapsulant. The supporting bar has an extended portion projecting from the first bonding finger and the second bonding finger and connected to a non-lead side of the encapsulant wherein the extended portion has an arched bend to absorb the pulling stresses and to block stress transmission. Cracks caused by delamination of the supporting bar will not be created during trimming the supporting bar along the non-lead side of the encapsulant. Moisture penetration along the cracks of the supporting bar to the die-bonding plane under the chip is desirably prevented.
    Type: Grant
    Filed: June 5, 2008
    Date of Patent: November 17, 2009
    Assignee: Powertech Technology Inc.
    Inventors: Chin-Fa Wang, Wan-Jung Hsieh, Yu-Mei Hsu
  • Publication number: 20090236710
    Abstract: A Chip-On-Lead (COL) semiconductor package is revealed, primarily comprising a plurality of leadframe's leads each having a carrying bar, a finger and a connecting portion connecting the carrying bar to the finger. A chip has a back surface attached to the carrying bars and is electrically connected to the fingers by a plurality of bonding wires. Therein, at least one of the bonding wires overpasses one of the connecting portions without electrical relationship. An insulation tape is attached onto the connecting portions in a manner to be formed between the overpassing section of the bonding wire and the overpast connecting portion so that electrical short can be avoided during wire-bonding processes of the COL semiconductor package. Therefore, the carrying bars under the chip have more flexibility in the layout design of COL semiconductor packages to use die pad(s) with smaller dimensions or even eliminate die pad.
    Type: Application
    Filed: March 19, 2008
    Publication date: September 24, 2009
    Inventors: Wan-Jung HSIEH, Chin-Fa WANG, Chin-Ti CHEN
  • Publication number: 20090224380
    Abstract: A lead frame with downset baffle paddles and a semiconductor package utilizing the same are revealed. The lead frame primarily comprises a plurality of leads formed oil a first plane, a baffle paddle formed on a second plane in parallel, and an internal tie bar formed between the first plane and the second plane. The internal tie bar has at least two or more windings such as ā€œSā€ shaped to flexibly connect the baffle paddle to an adjacent one of the leads. Therefore, the internal tie bar can reduce the shifting and twisting of the connected lead during the formation of the downset of the baffle paddle.
    Type: Application
    Filed: March 4, 2008
    Publication date: September 10, 2009
    Inventors: Chin-Fa WANG, Wan-Jung Hsieh, Yu-Mei Hsu
  • Patent number: 7564123
    Abstract: A semiconductor package primarily comprises a plurality of leadframe's leads, a chip, a paddle, an adhesive and an encapsulant encapsulating the components mentioned above. The paddle has a carrying surface and an exposed external surface. The first chip is attached to one surface of the leads. The paddle is attached to an opposing surface of the leads by the adhesive bonding the carrying surface to the leads. Furthermore, the adhesive further encapsulates the gaps between the leads without contaminating the exposed external surface and with the exposed external surface exposed from the encapsulant. Therefore, the leads obtain a better support so that the encapsulated portions of the leads will not shift nor expose from the encapsulant during molding processes without encapsulated bubbles between the leads and the paddle. The heat dissipation is also enhanced.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: July 21, 2009
    Assignee: Powertech Technology Inc.
    Inventors: Chin-Fa Wang, Chin-Ti Chen, Bing-Shun Yu, Wan-Jung Hsieh
  • Patent number: 7446160
    Abstract: A series of novel phosphorus-containing cured benzoxazine resins, which are synthesized from dihydrobenzoxazine resins with reactive phosphorus-containing compounds. The cured benzoxazine resins have desired flame retardancy and high glass transition temperature, and are suitable for the fabrication of printed circuit board and the semiconductor encapsulant applications.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: November 4, 2008
    Assignee: National Cheng Kung University
    Inventors: Chun Shan Wang, Jeng Yueh Shieh, Chi Yi Lin, Wan Jung Hsieh