Patents by Inventor Wan-Yan Lin

Wan-Yan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11756839
    Abstract: A method for manufacturing a MOS transistor includes following. A gate stack structure and a hardmask layer on the gate stack structure are sequentially formed on a substrate. A first spacer is formed on sidewalls of the gate stack structure and the hardmask layer. A photoresist layer is formed on a sidewall of the first spacer. A top surface of the photoresist layer is higher than a top surface of the gate stack structure. The hardmask layer and a portion of the first spacer are removed to expose the top surface of the gate stack structure. A top surface of a remaining first spacer is higher than the top surface of the gate stack structure. The photoresist layer is removed. A second spacer is formed on a sidewall of the remaining first spacer. A top surface of the second spacer is higher than the top surface of the gate stack.
    Type: Grant
    Filed: April 9, 2021
    Date of Patent: September 12, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wan-Yan Lin, Yu-Chieh Su, Ming-Chien Chiu, Mao-Hsing Chiu
  • Publication number: 20220216113
    Abstract: A method for manufacturing a MOS transistor includes following. A gate stack structure and a hardmask layer on the gate stack structure are sequentially formed on a substrate. A first spacer is formed on sidewalls of the gate stack structure and the hardmask layer. A photoresist layer is formed on a sidewall of the first spacer. A top surface of the photoresist layer is higher than a top surface of the gate stack structure. The hardmask layer and a portion of the first spacer are removed to expose the top surface of the gate stack structure. A top surface of a remaining first spacer is higher than the top surface of the gate stack structure. The photoresist layer is removed. A second spacer is formed on a sidewall of the remaining first spacer. A top surface of the second spacer is higher than the top surface of the gate stack.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 7, 2022
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Wan-Yan Lin, Yu-Chieh Su, Ming-Chien Chiu, Mao-Hsing Chiu
  • Patent number: 5962012
    Abstract: Scopolamine is a folksy cholinergic antagonist, and is used by parasympathetic nerves in autonomic nervous neurons as an anti-motion sickness drug or an anti-emesis drug. Since the human body most effectively absorbs this drug through the postauricular skin, the drug is administered by postauricular transdermal resorption patch. The penetrability of drug is increase by adding a dermal penetrative enhancer, because the penetration ability of patch-administered drugs is usually decreased by the penetrative blockade at dermal horny layers. The present invention discloses a penetration enhancer to increase dermal absorption and penetration of the cholinergic antagonist. The present invention finds that polyethylene and amide enhance penetration, about 2.2-2.8 fold. In accordance with the present invention, a penetration enhancer is added to the formulations of transdermal patch to increase the human body's absorption of scopolamine.
    Type: Grant
    Filed: February 11, 1998
    Date of Patent: October 5, 1999
    Assignee: Caleb Pharmaceuticals, Inc.
    Inventors: Wan-Yan Lin, Shu-Juan Chen, Chao-Wei Liao, Chien-Hsin D. Cheng