Abstract: Photovoltaic device with band-stop filter. The photovoltaic device includes an amorphous photovoltaic material and a band-stop filter structure having a stopband extending from a lower limiting angular frequency ?min?0 to an upper limiting angular frequency ?max where ?max>?min. The band-stop filter structure is arranged in the photovoltaic device relative to the photovoltaic material in order to attenuate electromagnetic radiations reaching the photovoltaic material with angular frequencies of ?* in the stopband, so that ?min<?*<?max. The angular frequencies ?* correspond to electronic excitations ??* from valence band tail (VBT) states of the amorphous photovoltaic material to conduction band tail (CBT) states of the amorphous photovoltaic material.

Abstract: A method of producing a photovoltaic device includes providing a stretchable substrate for the photovoltaic device; and stretching the substrate to produce a stretched substrate. The method further includes depositing a structure comprising hydrogenated amorphous silicon onto the stretched substrate; and subjecting the deposited hydrogenated amorphous silicon structure and the stretched substrate to a compressive force to form a compressively strained photovoltaic device.

Abstract: Photovoltaic device with band-stop filter. The photovoltaic device includes an amorphous photovoltaic material and a band-stop filter structure having a stopband extending from a lower limiting angular frequency ?min?0 to an upper limiting angular frequency ?max where ?max>?min. The band-stop filter structure is arranged in the photovoltaic device relative to the photovoltaic material in order to attenuate electromagnetic radiations reaching the photovoltaic material with angular frequencies of ?* in the stopband, so that ?min<?*<?max. The angular frequencies ?* correspond to electronic excitations ??* from valence band tail (VBT) states of the amorphous photovoltaic material to conduction band tail (CBT) states of the amorphous photovoltaic material.

Abstract: A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.

Abstract: A method of producing a photovoltaic device includes providing a stretchable substrate for the photovoltaic device; and stretching the substrate to produce a stretched substrate. The method further includes depositing a structure comprising hydrogenated amorphous silicon onto the stretched substrate; and subjecting the deposited hydrogenated amorphous silicon structure and the stretched substrate to a compressive force to form a compressively strained photovoltaic device.

Abstract: The present invention provides a gate stack structure that has high mobilities and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.

Abstract: A method of forming a high-K gate stack for a MOSFET device to control the threshold voltage for the MOSFET device. A first high-K metallic oxide layer is formed on a semiconductor substrate. At least one composite layer is then formed directly on the first layer. The composite layer is composed of a second high-K metallic oxide layer formed directly on a dipole induction layer. The dipole induction layer includes a high-K metallic oxide having higher oxygen vacancy affinity and lower oxygen vacancy diffusivity than the first and second layers. A metallic gate electrode is then formed on the composite layer. Formation of the various layers is such as to position the dipole induction layer of the composite layer between the gate electrode and substrate so as to shift the threshold voltage to a desired level. A high-K gate stack in a MOSFET device formed by the above method is also provided.

Abstract: The present invention provides a gate stack structure that has high mobilities and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.

Abstract: The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.

Abstract: The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.

Abstract: An article of manufacture comprises a substrate and a layer of N(x)Y(1?x)AlO3 on the substrate where x is a molar fraction greater than zero and less than one, and N is an element selected from La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. The article may be an electronic device further comprising an electrode electrically isolated from the substrate by the layer. In particular, the dielectric properties of the layer are such that the layer is especially although by no means exclusively useful for electrically isolating gate electrodes in field effect transistor devices. The layer may be formed on the substrate via molecular beam epitaxy.

Abstract: The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.

Abstract: A material is provided that can be used for a light-emitting device. The base unit of said material is tris(8-quinolinolato)aluminum(III) (Alq3). This Alq3 is substituted in the said 3- or 4-position with an electron-donor group and simultaneously in the said 5-position with an electro-acceptor or p-delocalizing group. Using this material as an emitting luminescent layer, the efficiency of the intrinsic luminescence can be greatly enhanced.

Abstract: An article of manufacture comprises a substrate and a layer of N(x)Y(1-x)AIO3 on the substrate where x is a molar fraction greater than zero and less than one, and N is an element selected from La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu. The article may be an electronic device further comprising an electrode electrically isolated from the substrate by the layer. In particular, the dielectric properties of the layer are such that the layer is especially although by no means exclusively useful for electrically isolating gate electrodes in field effect transistor devices. The layer may be formed on the substrate via molecular beam epitaxy.