Abstract: A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; a first data line extending from the display area into the peripheral area; a 1-1st lower load located in the peripheral area and electrically connected to the first data line; a 1-2nd lower load located in the peripheral area and electrically connected to the 1-1st lower load; a 1-1st upper load located in the peripheral area and above the 1-1st lower load, where the 1-1st upper load is insulated from the 1-1st lower load; and a 1-2nd upper load located in the peripheral area and above the 1-2nd lower load, where the 1-2nd upper load is insulated from the 1-2nd lower load and electrically connected to the 1-1st upper load.

Abstract: A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; a first data line extending from the display area into the peripheral area; a 1-1st lower load located in the peripheral area and electrically connected to the first data line; a 1-2nd lower load located in the peripheral area and electrically connected to the 1-1st lower load; a 1-1st upper load located in the peripheral area and above the 1-1st lower load, where the 1-1st upper load is insulated from the 1-1st lower load; and a 1-2nd upper load located in the peripheral area and above the 1-2nd lower load, where the 1-2nd upper load is insulated from the 1-2nd lower load and electrically connected to the 1-1st upper load.

Abstract: A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; a first data line extending from the display area into the peripheral area; a 1-1st lower load located in the peripheral area and electrically connected to the first data line; a 1-2nd lower load located in the peripheral area and electrically connected to the 1-1st lower load; a 1-1st upper load located in the peripheral area and above the 1-1st lower load, where the 1-1st upper load is insulated from the 1-1st lower load; and a 1-2nd upper load located in the peripheral area and above the 1-2nd lower load, where the 1-2nd upper load is insulated from the 1-2nd lower load and electrically connected to the 1-1st upper load.

Abstract: An array substrate includes a plurality of signal lines disposed in a display area; a plurality of signal pads disposed in a non-display area; and a fan-out portion disposed in the non-display. The fan-out portion includes a plurality of fan-out lines connecting the plurality of signal lines to the plurality of signal pads. Each of the plurality of fan-out lines includes a pattern electrically connected to a corresponding signal pad of the plurality of signal pads, and a straight portion electrically connected to a corresponding signal line of the plurality of signal lines. The pattern includes a first conductive layer. The straight portion includes the first conductive layer and a second conductive layer disposed on the first conductive layer.

Abstract: An array substrate includes a plurality of signal lines disposed in a display area; a plurality of signal pads disposed in a non-display area; and a fan-out portion disposed in the non-display. The fan-out portion includes a plurality of fan-out lines connecting the plurality of signal lines to the plurality of signal pads. Each of the plurality of fan-out lines includes a pattern electrically connected to a corresponding signal pad of the plurality of signal pads, and a straight portion electrically connected to a corresponding signal line of the plurality of signal lines. The pattern includes a first conductive layer. The straight portion includes the first conductive layer and a second conductive layer disposed on the first conductive layer.