Patents by Inventor Wang Chuen Khiang

Wang Chuen Khiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8288862
    Abstract: A semiconductor package, containing two or more stacked IC devices attached to a substrate. Each of the IC devices has a plurality of electrical contact regions which are connected to the substrate by means of electrical connections.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: October 16, 2012
    Assignee: United Test & Assembly Center Limited
    Inventors: Wang Chuen Khiang, Koh Yong Chuan, Fong Kok Chin
  • Patent number: 7504715
    Abstract: The present invention is directed to an interposer for packaging a microchip device, which includes a plurality of electrical contacts on an outer side of the interposer, for electrically contacting the packaged microchip device and to be electrically connected with the microchip device. There is an aperture extending from the outer side into the interposer. The aperture may be divided into at least two openings, and at least a first of the openings may extend from the outer side through the interposer in order to allow connection to the microchip device.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: March 17, 2009
    Assignee: United Test & Assembly Center Limited
    Inventor: Wang Chuen Khiang
  • Patent number: 7443041
    Abstract: A method of packaging a microchip device, an interposer for packaging, and a packaged microchip device. An interposer is placed on microchip devices. The interposer includes an aperture which extends from the interposer surface where external electrical contacts are located on the surface of the microchip devices. Electrical contacts on the microchip device surface are accessible through the aperture in order to electrically connect the electrical contacts with the external electrical contacts of the interposer. The aperture is divided into at least two openings or aperture regions, separated by a bridge. This facilitates the handling of the interposer.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: October 28, 2008
    Assignee: United Test & Assembly Center Limited
    Inventor: Wang Chuen Khiang
  • Patent number: 7129115
    Abstract: A method of packaging a microchip device, an interposer for packaging, and a packaged microchip device. An interposer is placed on microchip devices. The interposer includes an aperture which extends from the interposer surface where external electrical contacts are located to the surface of the microchip devices. Electrical contacts on the microchip device surface are accessible through the aperture in order to electrically connect the electrical contacts with the external electrical contacts of the interposer. The interposer includes separate openings or aperture regions, in particular separated by a bridge, which extend from the interposer surface where the external contacts are located into the interposer. This facilitates the handling of the finalized package and allows for satisfactory filling of the aperture with filling material.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: October 31, 2006
    Assignee: United Test & Assembly Center Limited
    Inventor: Wang Chuen Khiang
  • Patent number: 7023076
    Abstract: A semiconductor package, containing two or more IC devices. The IC devices are oriented in the same manner and at least two IC devices are separated by a die paddle that is attached to the active face of one of the IC devices, inward of the electrical contact areas.
    Type: Grant
    Filed: January 21, 2003
    Date of Patent: April 4, 2006
    Assignee: United Test & Assembly Center Limited
    Inventor: Wang Chuen Khiang
  • Publication number: 20040121511
    Abstract: A method of packaging a microchip device, an interposer for packaging, and a packaged microchip device. An interposer (7) is placed on microchip devices (1). The interposer (7) comprises an aperture (11) which extends from the interposer surface where external electrical contacts (9) are located to the surface of the microchip devices (1). Electrical contacts (3) on the microchip device surface are accessible through the aperture (11) in order to electrically connect the electrical contacts (3) with the external electrical contacts (9) of the interposer (7). The interposer (7) comprises separate openings or aperture regions, in particular separated by a bridge (19), which extend from the interposer surface where the external contacts (9) are located into the interposer (7). This facilitates the handling of the finalised package and allows for satisfactory filling of the aperture (11) with filling material.
    Type: Application
    Filed: March 21, 2003
    Publication date: June 24, 2004
    Inventor: Wang Chuen Khiang
  • Publication number: 20040012079
    Abstract: A semiconductor package, containing two or more IC devices. The IC devices are oriented in the same manner and at least two IC devices are separated by a die paddle that is attached to the active face of one of the IC devices, inward of the electrical contact areas.
    Type: Application
    Filed: January 21, 2003
    Publication date: January 22, 2004
    Applicant: United Test & Assembly Center Limited of Singapore
    Inventor: Wang Chuen Khiang
  • Publication number: 20030197284
    Abstract: A semiconductor package, containing two or more stacked IC devices attached to a substrate. Each of the IC devices has a plurality of electrical contact regions which are connected to the substrate by means of electrical connections.
    Type: Application
    Filed: February 11, 2003
    Publication date: October 23, 2003
    Applicant: United Test & Assembly Center Limited
    Inventors: Wang Chuen Khiang, Koh Yong Chuan, Fong Kok Chin