Patents by Inventor WANG Fenghai

WANG Fenghai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Operation instruction scheduling method and apparatus for nand flash memory device
    Patent number: 11112998
    Abstract: The present invention discloses an operation instruction scheduling method and device for a NAND flash memory device. The method comprises: performing task decomposition on the operation instruction of the NAND flash memory device, and sending an obtained task to a corresponding task queue; sending a current task to a corresponding arbitration queue according to a task type of the current task in the task queue; and scheduling a NAND interface for a to-be-executed task in the arbitration queue according to priority information of the arbitration queue. Embodiments of the present invention can efficiently realize operation instruction scheduling of a NAND flash memory device, improve flexibility of operation instruction scheduling of the NAND flash memory device, and improve overall performance of the NAND flash memory device.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: September 7, 2021
    Assignee: DERA CO., LTD.
    Inventors: Wang Fenghai, Xia Jiexu, Wang Song, Yang Ji, Zhang Jiantao
  • OPERATION INSTRUCTION SCHEDULING METHOD AND APPARATUS FOR NAND FLASH MEMORY DEVICE
    Publication number: 20190354317
    Abstract: The present invention discloses an operation instruction scheduling method and device for an NAND flash memory device. The method comprises: performing task decomposition on the operation instruction of the NAND flash memory device, and sending an obtained task to a corresponding task queue; sending a current task to a corresponding arbitration queue according to a task type of the current task in the task queue; and scheduling an NAND interface for a to-be-executed task in the arbitration queue according to priority information of the arbitration queue. Embodiments of the present invention can efficiently realize operation instruction scheduling of an NAND flash memory device, improve flexibility of operation instruction scheduling of the NAND flash memory device, and improve overall performance of the NAND flash memory device.
    Type: Application
    Filed: December 7, 2017
    Publication date: November 21, 2019
    Inventors: WANG Fenghai, XIA Jiexu, WANG Song, YANG Ji, ZHANG Jiantao