Patents by Inventor Wang Gu Lee
Wang Gu Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961742Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: August 23, 2021Date of Patent: April 16, 2024Assignee: AMKOR TECHNOLOGY SINGAPORE HOLDING PTE. LTD.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Publication number: 20230282532Abstract: In one example, a semiconductor device includes a substrate comprising a conductive structure including internal terminals over a substrate first side and external terminals over a substrate second side coupled to the internal terminals. An electronic component includes an electronic component first side, an electronic component second side opposite to the electronic component first side, and an electronic component lateral side connecting the electronic component first side to the electronic component second side. The electronic component second side is coupled to one or more of the internal terminals. A guide structure is over the substrate first side and can include an inner portion that is laterally inward from the electronic component lateral side and an outer portion that is laterally outward from the electronic component lateral side. An underfill is interposed between the electronic component second side and the substrate first side and is over the guide structure.Type: ApplicationFiled: May 12, 2023Publication date: September 7, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Wang Gu LEE, Gam Han YONG, Ju Hong SHIN, Ji Hun YI
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Patent number: 11688657Abstract: In one example, a semiconductor device includes a substrate having a substrate first side, a substrate second side opposite to the substrate first side, and a conductive structure including internal terminals over the substrate first side; and external terminals over the substrate second side and coupled to the internal terminals. An electronic component includes an electronic component first side, an electronic component second side opposite to the electronic component first side, and an electronic component lateral side connecting the electronic component first side to the electronic component second side. The electronic component second side is coupled to one or more of the internal terminals. A guide structure is over the substrate first side and can include an inner portion that is laterally inward from the electronic component lateral side and an outer portion that is laterally outward from the electronic component lateral side.Type: GrantFiled: February 10, 2021Date of Patent: June 27, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Wang Gu Lee, Gam Han Yong, Ju Hong Shin, Ji Hun Yi
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Publication number: 20220254694Abstract: In one example, a semiconductor device includes a substrate having a substrate first side, a substrate second side opposite to the substrate first side, and a conductive structure including internal terminals over the substrate first side; and external terminals over the substrate second side and coupled to the internal terminals. An electronic component includes an electronic component first side, an electronic component second side opposite to the electronic component first side, and an electronic component lateral side connecting the electronic component first side to the electronic component second side. The electronic component second side is coupled to one or more of the internal terminals. A guide structure is over the substrate first side and can include an inner portion that is laterally inward from the electronic component lateral side and an outer portion that is laterally outward from the electronic component lateral side.Type: ApplicationFiled: February 10, 2021Publication date: August 11, 2022Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Wang Gu LEE, Gam Han YONG, Ju Hong SHIN, Ji Hun YI
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Publication number: 20220148886Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: August 23, 2021Publication date: May 12, 2022Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 11101144Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: December 23, 2019Date of Patent: August 24, 2021Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Publication number: 20200303212Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: December 23, 2019Publication date: September 24, 2020Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 10515825Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: September 18, 2018Date of Patent: December 24, 2019Assignee: Amkor Technology, Inc.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 10388582Abstract: A semiconductor package and a manufacturing method thereof, which can reduce the size of the semiconductor package and improve product reliability. In a non-limiting example embodiment, the method may comprise forming an interposer on a wafer, forming at least one reinforcement member on the interposer, coupling and electrically connecting at least one semiconductor die to the interposer to the interposer, filling a region between the semiconductor die and the interposer with an underfill, and encapsulating the reinforcement member, the semiconductor die and the underfill on the interposer using an encapsulant.Type: GrantFiled: April 5, 2018Date of Patent: August 20, 2019Assignee: AMKOR TECHNOLOGY, INC.Inventors: Young Rae Kim, Won Chul Do, Ji Hun Lee, Min Hwa Chang, Dong Hyun Kim, Wang Gu Lee, Jin Ryang Hwang, Mi Kyeong Choi
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Publication number: 20190067035Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: September 18, 2018Publication date: February 28, 2019Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Patent number: 10079157Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: GrantFiled: December 22, 2015Date of Patent: September 18, 2018Assignee: Amkor Technology, Inc.Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Publication number: 20180226312Abstract: A semiconductor package and a manufacturing method thereof, which can reduce the size of the semiconductor package and improve product reliability. In a non-limiting example embodiment, the method may comprise forming an interposer on a wafer, forming at least one reinforcement member on the interposer, coupling and electrically connecting at least one semiconductor die to the interposer to the interposer, filling a region between the semiconductor die and the interposer with an underfill, and encapsulating the reinforcement member, the semiconductor die and the underfill on the interposer using an encapsulant.Type: ApplicationFiled: April 5, 2018Publication date: August 9, 2018Inventors: Young Rae Kim, Won Chul Do, Ji Hun Lee, Min Hwa Chang, Dong Hyun Kim, Wang Gu Lee, Jin Ryang Hwang, Mi Kyeong Choi
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Patent number: 9941180Abstract: A semiconductor package and a manufacturing method thereof, which can reduce the size of the semiconductor package and improve product reliability. In a non-limiting example embodiment, the method may comprise forming an interposer on a wafer, forming at least one reinforcement member on the interposer, coupling and electrically connecting at least one semiconductor die to the interposer to the interposer, filling a region between the semiconductor die and the interposer with an underfill, and encapsulating the reinforcement member, the semiconductor die and the underfill on the interposer using an encapsulant.Type: GrantFiled: May 6, 2016Date of Patent: April 10, 2018Assignee: Amkor Technology, Inc.Inventors: Young Rae Kim, Won Chul Do, Ji Hun Lee, Min Hwa Chang, Dong Hyun Kim, Wang Gu Lee, Jin Ryang Hwang, Mi Kyeong Choi
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Patent number: 9711484Abstract: In one embodiment, a semiconductor package includes a semiconductor die having conductive pads. A lead frame is directly connected to the conductive pads using an electrochemically formed layer or a conductive adhesive layer thereby facilitating an electrical connection between the conductive pads of the semiconductor die and the lead frame without using separate wire bonds or conductive bumps.Type: GrantFiled: May 29, 2015Date of Patent: July 18, 2017Assignee: Amkor Technology, Inc.Inventors: Jong Sik Paek, Doo Hyun Park, Wang Gu Lee, Yong Song, Sung Geun Kang
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Publication number: 20170117200Abstract: A semiconductor package and a manufacturing method thereof, which can reduce the size of the semiconductor package and improve product reliability. In a non-limiting example embodiment, the method may comprise forming an interposer on a wafer, forming at least one reinforcement member on the interposer, coupling and electrically connecting at least one semiconductor die to the interposer to the interposer, filling a region between the semiconductor die and the interposer with an underfill, and encapsulating the reinforcement member, the semiconductor die and the underfill on the interposer using an encapsulant.Type: ApplicationFiled: May 6, 2016Publication date: April 27, 2017Inventors: Young Rae Kim, Won Chul Do, Ji Hun Lee, Min Hwa Chang, Dong Hyun Kim, Wang Gu Lee, Jin Ryang Hwang, Mi Kyeong Choi
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Publication number: 20160379915Abstract: A semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device, and method of manufacturing thereof, that comprises a redistribution structure formed on a stiffening layer.Type: ApplicationFiled: May 8, 2016Publication date: December 29, 2016Inventors: Wang Gu Lee, Jong Sik Paek, Sung Geun Kang, Yong Song, Moo Gun Lee Lee, Na Rae Jang
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Publication number: 20160189980Abstract: A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide methods for manufacturing a semiconductor device, and semiconductor devices produced thereby, that comprise forming an interposer including a reinforcement layer.Type: ApplicationFiled: December 22, 2015Publication date: June 30, 2016Inventors: Jong Sik Paek, Doo Hyun Park, Seong Min Seo, Sung Geun Kang, Yong Song, Wang Gu Lee, Eun Young Lee, Seo Yeon Ahn, Pil Je Sung
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Publication number: 20160141229Abstract: In one embodiment, a semiconductor package includes a semiconductor die having conductive pads. A lead frame is directly connected to the conductive pads using an electrochemically formed layer or a conductive adhesive layer thereby facilitating an electrical connection between the conductive pads of the semiconductor die and the lead frame without using separate wire bonds or conductive bumps.Type: ApplicationFiled: May 29, 2015Publication date: May 19, 2016Applicant: AMKOR TECHNOLOGY, INC.Inventors: Jong Sik Paek, Doo Hyun Park, Wang Gu Lee, Yong Song, Sung Geun Kang
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Publication number: 20150021767Abstract: A semiconductor device with plated conductive pillar coupling is disclosed and may include a semiconductor die comprising a conductive pillar formed on a bond pad on the die, a substrate comprising an insulating layer with conductive patterns formed on a first surface of the substrate and a second surface opposite to the first surface, and a plating layer electrically coupling the conductive pillar and the bond pad on the first surface of the die to the conductive pattern on the first surface of the substrate. The conductive pillar, the conductive patterns, and the plating layer may comprise copper. The plating layer may fill a void between the copper pillar and the conductive pattern on the first surface of the substrate. The substrate may comprise a rigid circuit board, a flexible circuit board, a ceramic substrate, a semiconductor die, or semiconductor wafer.Type: ApplicationFiled: October 25, 2013Publication date: January 22, 2015Inventors: Doo Hyun Park, Seong Min Seo, Wang Gu Lee, Jong Sik Paek, Won Chul Do