Abstract: The invention provides a composition containing extracts from salvia miltiorrhiza bunge, gynostemma pentaphyllummak, Chinese magnoliavine, cordyceps extract piece, pollen pini, and semen persicae and methods of and using the same.

Abstract: A wireless transmit/receive unit is configured to receive system level information, including discontinuous reception (DRX) information, cell selection information, and RACH information. The system level information is received as defined parameters assigned to system information blocks or signaled through dedicated RRC signaling.

Abstract: The invention provides a composition containing extracts from salvia miltiorrhiza bunge, gynostemma pentaphyllum mak, Chinese magnoliavine, cordyceps extract piece, pollen pini, and semen persicae and methods of and using the same.

Abstract: An image quality control system and method is disclosed. At least one infrared camera takes a screen image of a room. When there are a plurality of cameras, images of the cameras are synchronized with respect to time, and a specific object of the image is tracked to estimate image quality of the object. When there are a plurality of cameras, a 3D screen model is reconfigured, and positions of the cameras and the infrared lighting tools are controlled. Infrared lighting and the cameras are controlled, and particularly, optical axis direction, optical magnification, exposure time, and the iris of the camera can be amended. Next, a high-quality object image list can be generated so as to process the images.

Abstract: A memory foam pad that is porous enough to allow water to pass through it, and methods for making the memory foam pad.

Abstract: The present invention relates to a UWB radio transmission module including a UWB signal generation circuit. The UWB signal generation circuit controls the power consumption outputs according to a power supply opening/closing mode, and is connected to a common resonator and a feedback circuit type of UWB signal output device.

Abstract: The present invention provides a mobile communication terminal, and more particularly, a folding-type mobile communication terminal provided with a locking device that selectively restricts use of the terminal via user authentication. In one embodiment, the present invention includes a housing including first and second housing portions mutually joined together via a hinge, wherein the housing can be opened and closed by rotation of the first and second housing portions about the hinge. An authentication means for enabling user authentication while the housing is closed is provided, wherein the authentication means is included on an exterior of the housing. Also a locking means is provided for preventing the housing from being opened while the user is not authenticated via the user authentication means, wherein the locking means is included in the housing.

Abstract: In order to reduce the leakage current and increase the ESD protection performance, several MOS capacitors are serially connected. The E field between the gate and the source/drain of the MOS transistor is lowered and so is the gate leakage current. Besides, because the ESD voltage is distributed on the gates of the MOS capacitors, the MOS capacitors have good ESD protection performance.

Abstract: An image quality control system and method is disclosed. At least one infrared camera takes a screen image of a room. When there are a plurality of cameras, images of the cameras are synchronized with respect to time, and a specific object of the image is tracked to estimate image quality of the object. When there are a plurality of cameras, a 3D screen model is reconfigured, and positions of the cameras and the infrared lighting tools are controlled. Infrared lighting and the cameras are controlled, and particularly, optical axis direction, optical magnification, exposure time, and the iris of the camera can be amended. Next, a high-quality object image list can be generated so as to process the images.

Abstract: The present invention relates to a UWB radio transmission module including a UWB signal generation circuit. The UWB signal generation circuit controls the power consumption outputs according to a power supply opening/closing mode, and is connected to a common resonator and a feedback circuit type of UWB signal output device.

Abstract: A SIP (system in package) with a chip and a memory mode, capable of performing integration test on the memory module even if the memory module does not include any scan chain is provided. The chip has a built-in self-test (BIST) circuit, which generates test pattern signals to test the memory module in response to a mode signal. Under a test mode, after the memory module receives the test pattern signals, the memory module outputs responsive readout signals to the BIST circuit and the BIST circuit determines and outputs a test result and a test record in response to the readout signals. If the test fails, conditions of the faulty memory module are recognized from the test record.

Abstract: A SIP (system in package) with a chip and a memory mode, capable of performing integration test on the memory module even if the memory module does not include any scan chain is provided. The chip has a built-in self-test (BIST) circuit, which generates test pattern signals to test the memory module in response to a mode signal. Under a test mode, after the memory module receives the test pattern signals, the memory module outputs responsive readout signals to the BIST circuit and the BIST circuit determines and outputs a test result and a test record in response to the readout signals. If the test fails, conditions of the faulty memory module are recognized from the test record.

Abstract: An I/O circuit placement method. In the I/O circuit placement method, at least two rows of I/O circuits are placed on a first side of the chip, and each I/O circuit has a head section and a tail section. The placement direction of the head section and the tail section is perpendicular to the placement direction of the I/O circuits in the rows. The semiconductor further has a core circuit disposed on the chip, wherein the rows of I/O circuits are disposed outside the core circuit and are at the periphery of the chip. Due to the I/O circuit placement in the semiconductor device, the present invention reduces the area of the semiconductor chip and fabrication cost.

Abstract: A parametric measuring circuit for minimizing an oscillation effect is provided. The parametric measuring circuit comprises an input detection circuit, an oscillation effect eliminating logic circuit and an output selection circuit. The input detection circuit receives an input signal from an external input terminal and outputs the detection signal. The oscillation effect eliminating logic circuit is coupled to the input detection circuit for reducing/eliminating oscillation effect and outputting the detection signal. The output selection circuit is coupled to the oscillation effect eliminating logic circuit to select and transmit either the output signal generated from the internal circuit or the detection signal to the output terminal.

Abstract: Disclosed is a method of intruder's detection, comprising of using of more than 1 sensor, represented, for example, by video cameras that are arranged with fixed spatial orientation for stereo detector formation at that 2D distributions of light intensity that form stereo images registered by stereo detector are transmitting to blocks of processing, for example, blocks of digital processing at that mentioned blocks of digital processing perform processing of sequence of stereo images with different frequencies (high and low), to determine the presence of intruder, it's position and speed of transference.

Abstract: A memory test system for peak power reduction. The memory test system includes a plurality of memories, a plurality of memory built-in self-test circuits and a plurality of delay units. Each of the memory built-in self-test circuits comprises a built-in self-test controller for receiving a clock signal and producing a plurality of required control signals to test one of the memories. Each of the delay units is coupled between two adjacent built-in self-test controllers. The clock signal input to one of the built-in self-test controllers is received by the delay unit to produce a delayed clock signal, and the delay unit outputs the delayed clock signal to the other.

Abstract: An I/O circuit placement method. In the I/O circuit placement method, at least two rows of I/O circuits are placed on a first side of the chip, and each I/O circuit has a head section and a tail section. The placement direction of the head section and the tail section is perpendicular to the placement direction of the I/O circuits in the rows. The semiconductor further has a core circuit disposed on the chip, wherein the rows of I/O circuits are disposed outside the core circuit and are at the periphery of the chip. Due to the I/O circuit placement in the semiconductor device, the present invention reduces the area of the semiconductor chip and fabrication cost.

Abstract: A mux scan cell includes a multiplexer having a first input node for receiving raw data, a second input node for receiving test data, an output node, a selection node, and a delay circuit electrically connected between the second input node and the output node for prolonging a traveling time which the test data takes to travel from the second input node to the output node. The mux scan cell also includes a flip-flop connected to the multiplexer. With the delay circuit, the traveling time of the test data is prolonged such that the traveling time which the test data takes to travel from the second input node to the output node simulates a sum of a traveling time in which the raw data travels through a combinational logic and a traveling time in which the raw data travels from the first input node to the output node.

Abstract: Disclosed is a method of intruder's detection, comprising of using of more than 1 sensor, represented, for example, by video cameras that are arranged with fixed spatial orientation for stereo detector formation at that 2D distributions of light intensity that form stereo images registered by stereo detector are transmitting to blocks of processing, for example, blocks of digital processing at that mentioned blocks of digital processing perform processing of sequence of stereo images with different frequencies (high and low), to determine the presence of intruder, it's position and speed of transference.

Abstract: A memory test system for peak power reduction. The memory test system includes a plurality of memories, a plurality of memory built-in self-test circuits and a plurality of delay units. Each of the memory built-in self-test circuits comprises a built-in self-test controller for receiving a clock signal and producing a plurality of required control signals to test one of the memories. Each of the delay units is coupled between two adjacent built-in self-test controllers. The clock signal input to one of the built-in self-test controllers is received by the delay unit to produce a delayed clock signal, and the delay unit outputs the delayed clock signal to the other.