Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A positive electrode active material for a secondary battery which includes a nickel-based lithium composite transition metal oxide including nickel (Ni), wherein the lithium composite transition metal oxide satisfies Equation 1 and Equation 2 below 80 nm?crystallite sizeFWHM?150 nm??[Equation 1] ?size(|crystallite sizeIB?crystallite sizeFWHM|)?20??[Equation 2] wherein, in Equation 1 and Equation 2, crystallite sizeFWHM is a crystallite size obtained by calculating from X-ray diffraction (XRD) data using a full width at half maximum (FWHM) method, and crystallite sizeIB is a crystallite size obtained by calculating from XRD data using an integral breadth (IB) method.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A light emitting display device includes: a substrate; a transistor disposed on the substrate; an anode connected to the transistor; an emission layer disposed on the anode; a common voltage line disposed on the substrate; and a cathode disposed on the emission layer and the common voltage line, where a thickness of a first portion of the cathode overlapping the emission layer is different from a thickness of a second portion of the cathode not overlapping the emission layer.

Abstract: A display device includes: a substrate; a polycrystalline semiconductor layer which includes a first electrode, a channel, and a second electrode of a driving transistor disposed on the substrate; a first gate insulating layer disposed on the polycrystalline semiconductor layer; a gate electrode of the driving transistor which is disposed on the first gate insulating layer and overlaps the channel; a lower first scan line disposed on the first gate insulating layer; a second gate insulating layer disposed on the gate electrode and on the lower first scan line; a first lower boost electrode disposed on the second gate insulating layer; a first interlayer-insulating layer disposed on the first lower boost electrode; an oxide semiconductor layer disposed on the first interlayer-insulating layer and including a first upper boost electrode overlapping the first lower boost electrode; and a first connection electrode connecting the gate electrode and the first upper boost electrode.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A light-emitting display device includes a first transistor including a driving gate electrode, a first electrode, and a second electrode, a storage capacitor including a first electrode and a second electrode connected to the driving gate electrode, a second transistor connected to the second electrode of the storage capacitor, a first hold capacitor including a first electrode connected to the second electrode of the storage capacitor and a second electrode to which a driving voltage is applied, a second hold capacitor including a first electrode connected to the second electrode of the storage capacitor and a second electrode to which a driving voltage is applied, a third transistor connecting the driving gate electrode and the second electrode of the first transistor, and a light-emitting diode. Conductive layers in which the first electrode of the first hold capacitor and the first electrode of the second hold capacitor are disposed are different.

Abstract: A pixel includes: a driving transistor including a gate electrode coupled to a first node, a first electrode coupled to a second node, and a second electrode coupled to a third node; a first initialization transistor coupled between the first node and a first initialization voltage line, and including a gate electrode coupled to a scan line, where the first initialization voltage line is configured to supply a first initialization voltage; a first emission control transistor coupled between a fourth node and a fifth node and including a gate electrode coupled to the first node; a second emission control transistor coupled between the third node and the fifth node and including a gate electrode coupled to an emission control line; and a light-emitting element coupled between the fourth node and a driving low voltage line. The driving transistor and the first emission control transistor are different types of transistors.

Abstract: A pixel includes: a driving transistor including a gate electrode coupled to a first node, a first electrode coupled to a second node, and a second electrode coupled to a third node; a first initialization transistor coupled between the first node and a first initialization voltage line, and including a gate electrode coupled to a scan line, where the first initialization voltage line is configured to supply a first initialization voltage; a first emission control transistor coupled between a fourth node and a fifth node and including a gate electrode coupled to the first node; a second emission control transistor coupled between the third node and the fifth node and including a gate electrode coupled to an emission control line; and a light-emitting element coupled between the fourth node and a driving low voltage line. The driving transistor and the first emission control transistor are different types of transistors.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A display device including: a substrate including a display area and a non-display area; and a pad in the non-display area, wherein the pad includes a first electrode layer, a second electrode layer, a third electrode layer, and a fourth electrode layer sequentially on the substrate, the second electrode layer contacts the first electrode layer through a contact hole in a plurality of insulating layers, and an organic layer between the third electrode layer and the fourth electrode layer.

Abstract: A display panel includes: a base layer including an emission area and a sensor area; a pixel circuit disposed on the emission area of the base layer; illuminance sensors disposed on the sensor area of the base layer, each of the illuminance sensors including a light receiving element overlapping the sensor area, the light receiving element disposed to be adjacent to the pixel circuit; light emitting elements disposed on the pixel circuit, each of the light emitting elements including a light emitting layer overlapping the emission area; a black matrix including openings overlapping the light emitting layer; and a color filter disposed on the light emitting elements and the black matrix.

Abstract: A display device includes: a substrate; a polycrystalline semiconductor layer which includes a first electrode, a channel, and a second electrode of a driving transistor disposed on the substrate; a first gate insulating layer disposed on the polycrystalline semiconductor layer; a gate electrode of the driving transistor which is disposed on the first gate insulating layer and overlaps the channel; a lower first scan line disposed on the first gate insulating layer; a second gate insulating layer disposed on the gate electrode and on the lower first scan line; a first lower boost electrode disposed on the second gate insulating layer; a first interlayer-insulating layer disposed on the first lower boost electrode; an oxide semiconductor layer disposed on the first interlayer-insulating layer and including a first upper boost electrode overlapping the first lower boost electrode; and a first connection electrode connecting the gate electrode and the first upper boost electrode.

Abstract: A display device includes: a substrate including a display area at which a pixel including a light emitting element is located and a peripheral area surrounding the display area; and a common voltage line on the substrate, the common voltage line configured to provide a common voltage to the pixel, the common voltage line including: a peripheral common voltage line on the peripheral area of the substrate to surround the display area and connected to a common electrode of the light emitting element; and a plurality of display common voltage lines crossing the display area and each contacting different portions of the peripheral common voltage line, the display common voltage lines being spaced apart from the common electrode of the light emitting element.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A pixel circuit includes first to fifth transistors, a capacitor, and a light emitting element. The first transistor is coupled between first and second power lines, and includes a gate electrode coupled to a first node and a back-gate electrode coupled to a second node. The second transistor is coupled between a data line and the first node, and includes a gate electrode coupled to a first scan line. The third transistor is coupled between a third power line and the first node, and includes a gate electrode coupled to a reference scan line. The fourth transistor is coupled between a second node and a fourth power line, and includes a gate electrode coupled to a second scan line. The fifth transistor is coupled between a first power line and the one electrode of the first transistor, and includes a gate electrode coupled to a light-emitting control line.

Abstract: A display device includes: a substrate including a display area at which a pixel including a light emitting element is located and a peripheral area surrounding the display area; and a common voltage line on the substrate, the common voltage line configured to provide a common voltage to the pixel, the common voltage line including: a peripheral common voltage line on the peripheral area of the substrate to surround the display area and connected to a common electrode of the light emitting element; and a plurality of display common voltage lines crossing the display area and each contacting different portions of the peripheral common voltage line, the display common voltage lines being spaced apart from the common electrode of the light emitting element.

Abstract: An organic light emitting display (OLED) device includes a substrate including a light emitting region and a peripheral region. An auxiliary power supply wire is disposed in the peripheral region. A lower electrode is disposed in the light emitting region. A pixel defining layer, disposed on the substrate, exposes a portion of the lower electrode and a portion of the auxiliary power supply wire. A first common layer, disposed on the pixel defining layer and the lower electrode, exposes the auxiliary power supply wire. A light emitting structure is disposed on the first common layer. The light emitting structure exposes the auxiliary power supply wire. A second common layer is disposed on the light emitting structure, the second common layer covering the light emitting structure and exposing the auxiliary power supply wire. An upper electrode is disposed on the second common layer and contacts the auxiliary power supply wire.

Abstract: An organic light emitting display (OLED) device includes a substrate including a light emitting region and a peripheral region. An auxiliary power supply wire is disposed in the peripheral region. A lower electrode is disposed in the light emitting region. A pixel defining layer, disposed on the substrate, exposes a portion of the lower electrode and a portion of the auxiliary power supply wire. A first common layer, disposed on the pixel defining layer and the lower electrode, exposes the auxiliary power supply wire. A light emitting structure is disposed on the first common layer. The light emitting structure exposes the auxiliary power supply wire. A second common layer is disposed on the light emitting structure, the second common layer covering the light emitting structure and exposing the auxiliary power supply wire. An upper electrode is disposed on the second common layer and contacts the auxiliary power supply wire.