Patents by Inventor Wang Lee

Wang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12261201
    Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
    Type: Grant
    Filed: November 1, 2023
    Date of Patent: March 25, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hun Kim, Jae Seok Yang, Hae Wang Lee
  • Patent number: 12223576
    Abstract: Disclosed is an avatar creation method including creating a base object of an avatar, creating at least one partial object; acquiring customizing information of a user, deforming the base object and the at least one partial object based on the customizing information; and creating a user avatar with a default facial expression by projecting the at least one partial object onto the surface of the base object.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: February 11, 2025
    Assignee: illuni Inc.
    Inventors: Byung Hwa Park, Jae Wang Lee, Gabee Jo, Ho Jeong Shin, Kun Sang Jung
  • Patent number: 12068326
    Abstract: A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.
    Type: Grant
    Filed: February 28, 2023
    Date of Patent: August 20, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hun Kim, Jae-Seok Yang, Hae-Wang Lee
  • Publication number: 20240177389
    Abstract: Disclosed is an avatar creation method including creating a base object of an avatar, creating at least one partial object; acquiring customizing information of a user, deforming the base object and the at least one partial object based on the customizing information; and creating a user avatar with a default facial expression by projecting the at least one partial object onto the surface of the base object.
    Type: Application
    Filed: November 30, 2022
    Publication date: May 30, 2024
    Inventors: Byung Hwa PARK, Jae Wang LEE, Gabee JO, Ho Jeong SHIN, Kun Sang JUNG
  • Patent number: 11973109
    Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: April 30, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hun Kim, Jae Seok Yang, Hae Wang Lee
  • Publication number: 20240063259
    Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
    Type: Application
    Filed: November 1, 2023
    Publication date: February 22, 2024
    Inventors: Young-Hun KIM, Jae Seok YANG, Hae Wang LEE
  • Patent number: 11732249
    Abstract: The disclosure provides a modified UDP-GlcNAc:Lysosomal Enzyme GlcNAc phosphotransferase with enhanced ability to phosphorylate lysosomal enzymes and methods of use thereof.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: August 22, 2023
    Assignee: Washington University
    Inventors: Stuart Kornfeld, Lin Liu, Wang Lee, Balraj Doray
  • Patent number: 11710736
    Abstract: A semiconductor device includes a first active structure on a substrate including a first epitaxial pattern, a second epitaxial pattern and a first channel pattern between the first epitaxial pattern and the second epitaxial pattern, the first channel pattern including at least one channel pattern stacked on the substrate. A first gate structure is disposed on top and bottom surfaces of the first channel pattern. A second active structure on the substrate and includes the second epitaxial pattern, a third epitaxial pattern and a second channel pattern between the second epitaxial pattern and the third epitaxial pattern in the first direction. The second channel pattern includes at least one channel pattern stacked on the substrate. The number of stacked second channel patterns is greater than the number of stacked first channel patterns. A second gate structure is disposed on top and bottom surfaces of the second channel pattern.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: July 25, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Hae-Wang Lee
  • Publication number: 20230215868
    Abstract: A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.
    Type: Application
    Filed: February 28, 2023
    Publication date: July 6, 2023
    Inventors: YOUNG-HUN KIM, JAE-SEOK YANG, HAE-WANG LEE
  • Patent number: 11600639
    Abstract: A semiconductor device includes a substrate having cell areas and power areas that are alternately arranged in a second direction. Gate structures extend in the second direction. The gate structures are spaced apart from each other in a first direction perpendicular to the second direction. Junction layers are arranged at both sides of each gate structure. The junction layers are arranged in the second direction such that each of the junction layer has a flat portion that is proximate to the power area. Cutting patterns are arranged in the power areas. The cutting patterns extend in the first direction such that each of the gate structures and each of the junction layers in neighboring cell areas are separated from each other by the cutting pattern.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: March 7, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hun Kim, Jae-Seok Yang, Hae-Wang Lee
  • Patent number: 11465456
    Abstract: A self-monitoring tire includes a tire body and a tire pressure sensor. The tire body includes a tread rubber for contact with ground, a bead for coupling to a rim, and a sidewall structure including two portions disposed at opposite sides of the tread rubber, and extending from opposite sides of the tread rubber to the bead. The tire pressure sensor is disposed between respective outward surfaces of the two portions of the sidewall structure, and secured on or embedded in either one of the two portions of the sidewall structure.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: October 11, 2022
    Assignee: ALPHA NETWORKS INC.
    Inventors: Chun-Yuan Wang, Rong-Fa Kuo, Chung-Wang Lee
  • Patent number: 11335682
    Abstract: An integrated circuit device may include a fin-type active region extending in a first direction on a substrate; an insulating separation structure extending in a second direction that intersects the first direction on the fin-type active region; a pair of split gate lines spaced apart from each other with the insulating separation structure therebetween and extending in the second direction to be aligned with the insulating separation structure; a pair of source/drain regions located on the fin-type active region and spaced apart from each other with the insulating separation structure therebetween; and a jumper contact located over the insulating separation structure and connected between the pair of source/drain regions.
    Type: Grant
    Filed: July 3, 2020
    Date of Patent: May 17, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jung-hyuck Choi, Hae-wang Lee, Hyoun-jee Ha, Chul-hong Park
  • Patent number: 11295907
    Abstract: A backlight module is provided. The backlight module includes a backlight control circuit and a plurality of multiple light-emitting elements coupled in series and coupled to the backlight control circuit. The backlight control circuit transmits a packet. Each of the light-emitting elements compares an address of the packet with an individual address of each of the light-emitting elements. When the address of the packet matches the individual address of a target light-emitting element of the light-emitting elements, the target light-emitting element emits light according to a light-emitting data of the packet. Each of the light-emitting elements transmits the packet to a next light-emitting element.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: April 5, 2022
    Inventor: Hsi-Wang Lee
  • Publication number: 20220077284
    Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Inventors: Young-Hun KIM, Jae Seok YANG, Hae Wang LEE
  • Publication number: 20220012046
    Abstract: An OS-independent peripheral plug-and-play and driver update method for embedded system and firmware data transmission method for embedded system platform is provided. The method includes: determining whether a peripheral device is connected to the embedded system host; when the peripheral device is connected to the embedded system host, acquire the ID of the peripheral device; connecting to a firmware server; according to the ID, acquiring a driver; packing the driver into a firmware and transmitting to the embedded system host; and performing a firmware update.
    Type: Application
    Filed: November 25, 2020
    Publication date: January 13, 2022
    Inventors: Kung-Wang LEE, Kai-Chao YANG
  • Patent number: 11195910
    Abstract: A semiconductor device is provided. The semiconductor device comprising a first fin pattern and a second fin pattern which are separated by a first isolation trench and extend in a first direction, a third fin pattern which is spaced apart from the first fin pattern in a second direction intersecting the first direction and extends in the first direction, a fourth fin pattern which is separated from the third fin pattern by a second isolation trench, a first gate structure which intersects the first fin pattern and has a portion extending along an upper surface of the first fin pattern, a second gate structure which intersects the second fin pattern and has a portion extending along an upper surface of the second fin pattern and a first element isolation structure which fills the second isolation trench and faces a short side of the first gate structure.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: December 7, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Hun Kim, Jae Seok Yang, Hae Wang Lee
  • Publication number: 20210352786
    Abstract: A backlight module is provided. The backlight module includes a backlight control circuit and a plurality of multiple light-emitting elements coupled in series and coupled to the backlight control circuit. The backlight control circuit transmits a packet. Each of the light-emitting elements compares an address of the packet with an individual address of each of the light-emitting elements. When the address of the packet matches the individual address of a target light-emitting element of the light-emitting elements, the target light-emitting element emits light according to a light-emitting data of the packet. Each of the light-emitting elements transmits the packet to a next light-emitting element.
    Type: Application
    Filed: January 19, 2021
    Publication date: November 11, 2021
    Inventor: Hsi-Wang LEE
  • Publication number: 20210246318
    Abstract: The present disclosure discloses an antibacterial film structure. The antibacterial film structure comprises a silica base layer, an organic hydrophilic antibacterial layer, and a silica protective layer. The organic hydrophilic antibacterial layer is disposed on the silica base layer, and the silica protective layer is disposed on the organic hydrophilic antibacterial layer.
    Type: Application
    Filed: February 8, 2021
    Publication date: August 12, 2021
    Inventors: Chin-Wang Lee, Chung-Ping Chou
  • Patent number: D937699
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: December 7, 2021
    Inventor: Jeffrey Wang Lee
  • Patent number: D1023787
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: April 23, 2024
    Assignee: BIG HEART PET, INC.
    Inventors: Patricia Ann Waynick, Wang Lee, Julius Austria Coronel, Benjamin Cooper Priess, Thomas Paul Nichols