Abstract: A clock generation device comprises a clock generation unit, a counter, a common factor calculation element, a first frequency divider, a phase-locked loop (PLL) and a second frequency divider. The counter receives a clock signal from the clock generation unit and a periodic signal from a USB host, and outputs a count value. The common factor calculation element calculates the common factor of the count value and a value to output a first adjustment value and a second adjustment value. The first frequency divider divides the frequency of the clock signal by the first adjustment value to output a reference signal. The second frequency divider divides the frequency of the output clock signal of the PLL by the second adjustment value to obtain a feedback signal input to the PLL. Based on the reference signal and the feedback signal, the PLL outputs a clock signal complying with the USB specification.

Abstract: A frequency locking structure applied to phase-locked loops (PLL) utilizes a common factor to reduce the difference between an output signal of oscillation and an input signal of reference for the jitter reduction of the input signal of reference. Moreover, a count value of clock signal is an input of a greatest-common-factor calculator to acquire an adaptive value and a feedback adaptive value for the common factor of a divider. Such a frequency locking structure both prevents the PLL from being in error about outputting frequency and dynamically adjusts the common factors for different purposes.

Abstract: A frequency locking structure applied to phase-locked loops (PLL) utilizes a common factor to reduce the difference between an output signal of oscillation and an input signal of reference for the jitter reduction of the input signal of reference. Moreover, a count value of clock signal is an input of a greatest-common-factor calculator to acquire an adaptive value and a feedback adaptive value for the common factor of a divider. Such a frequency locking structure both prevents the PLL from being in error about outputting frequency and dynamically adjusts the common factors for different purposes.