Abstract: Embodiments described herein generally relate to electronic devices and electronic device manufacturing. More particularly, some embodiments of the present disclosure provide methods of manufacturing memory devices, for example, dynamic random-access memory cells with buried word-lines. In an embodiment, a method of manufacturing an electronic device is provided. The method includes recessing a metal layer to a first predetermined depth to form a recessed metal layer. The metal layer at least partially fills each feature of a plurality of features formed on a substrate and each feature has a feature depth. The method further includes exposing the recessed metal layer to a carbon-containing plasma to form a metal-carbide layer on the recessed metal layer. The method further includes recessing the recessed metal layer to a second predetermined depth by etching the metal-carbide layer and the recessed metal layer.

Abstract: Methods and processes for forming semiconductor devices with reduced yield loss and failed dies are provided. One method includes, for instance: obtaining a wafer after at least one fabrication processing; taking first r, ?, z measurements of the wafer after the at least one fabrication processing; performing at least one second fabrication processing; taking second r, ?, z measurements of the wafer after the at least one second fabrication processing; and analyzing the second r, ?, z measurements with respect to the first r, ?, z measurements. A process includes, for instance: obtaining a wafer with a substrate and at least one first device positioned on the substrate; taking first measurements in a r, ?, z coordinate system; forming at least one second device over the substrate; taking second measurements in the r, ?, z coordinate system; and analyzing the second measurements with respect to the first measurements.

Abstract: Methods and processes for forming semiconductor devices with reduced yield loss and failed dies are provided. One method includes, for instance: obtaining a wafer after at least one fabrication processing; taking first r, ?, z measurements of the wafer after the at least one fabrication processing; performing at least one second fabrication processing; taking second r, ?, z measurements of the wafer after the at least one second fabrication processing; and analyzing the second r, ?, z measurements with respect to the first r, ?, z measurements. A process includes, for instance: obtaining a wafer with a substrate and at least one first device positioned on the substrate; taking first measurements in a r, ?, z coordinate system; forming at least one second device over the substrate; taking second measurements in the r, ?, z coordinate system; and analyzing the second measurements with respect to the first measurements.