Patents by Inventor Wangqin Yang

Wangqin Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and fabricating method thereof
    Patent number: 12727203
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof includes a source structure, a drain structure, a gate structure, a bottom dielectric layer, a gate dielectric layer, a channel structure, and a metal nitride layer. The source structure and the drain structure are stacked in a vertical direction, and the gate structure is between the drain structure and the source structure. The bottom dielectric layer is disposed between the drain structure and the source structure. The channel structure is disposed between the drain structure and the source structure and is electrically connected the drain structure and the source structure, and the channel structure is partially disposed in the gate structure. The gate dielectric layer is disposed between the channel structure and the gate structure. The metal nitride layer is disposed between the gate dielectric layer and the gate structure.
    Type: Grant
    Filed: August 28, 2023
    Date of Patent: September 1, 2026
    Assignee: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Gang Wu, Mingru Ge, Guoguo Kong, Shiwei He, Wangqin Yang, Yongjian Yu
  • SEMICONDUCTOR DEVICE AND FABRICATING METHOD THEREOF
    Publication number: 20240355933
    Abstract: The present disclosure provides a semiconductor device and a fabricating method thereof includes a source structure, a drain structure, a gate structure, a bottom dielectric layer, a gate dielectric layer, a channel structure, and a metal nitride layer. The source structure and the drain structure are stacked in a vertical direction, and the gate structure is between the drain structure and the source structure. The bottom dielectric layer is disposed between the drain structure and the source structure. The channel structure is disposed between the drain structure and the source structure and is electrically connected the drain structure and the source structure, and the channel structure is partially disposed in the gate structure. The gate dielectric layer is disposed between the channel structure and the gate structure. The metal nitride layer is disposed between the gate dielectric layer and the gate structure.
    Type: Application
    Filed: August 28, 2023
    Publication date: October 24, 2024
    Applicant: Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Gang WU, Mingru GE, Guoguo KONG, Shiwei HE, Wangqin Yang, Yongjian YU